參數(shù)資料
型號： S29GL032M10BFIR50
廠商： SPANSION LLC
元件分類： DRAM
英文描述： MirrorBit Flash Family
中文描述： 2M X 16 FLASH 3V PROM, 100 ns, PBGA48
封裝： 8 X 6 MM, LEAD FREE, BGA-48
文件頁數(shù)： 114/159頁
文件大小： 2217K
代理商： S29GL032M10BFIR50
114
S29GLxxxM MirrorBit
TM
Flash Family
S29GLxxxM_00_B3 Octorber 18, 2004
D a t a s h e e t
Table 36. Command Definitions (x8 Mode, BYTE# = V
IL
)
Command
Sequence
(Note 1)
C
Bus Cycles (Notes 2–5)
Third
Addr
Data
First
Second
Addr
Fourth
Fifth
Sixth
Addr
RA
XXX
AAA
Data
RD
F0
AA
Data
Addr
Data
Addr
Data
Addr
Data
Read (Note 6)
1
1
4
Reset (Note 7)
A
Enter SecSi Sector Region
Manufacturer ID
555
55
AAA
90
X00
01
Device ID (Note 9)
4
AAA
AA
555
55
AAA
90
X02
7E
X1C
(Note
17)
X1E
(Note
17)
SecSi‰ Sector Factory Protect
(Note 10)
Sector Group Protect Verify (Note
12)
4
AAA
AA
555
55
AAA
90
X06
(Note 10)
4
AAA
AA
555
55
AAA
90
(SA)X04
00/01
3
4
3
1
3
6
6
1
1
1
AAA
AAA
AAA
SA
AAA
AAA
AAA
XXX
XXX
AA
AA
AA
AA
29
AA
AA
AA
B0
30
98
555
555
555
55
55
55
AAA
AAA
SA
88
90
25
Exit SecSi Sector Region
XXX
SA
00
BC
Write to Buffer (Note 11)
PA
PD
WBL
PD
Program Buffer to Flash
Write to Buffer Abort Reset (Note 13)
555
555
555
55
55
55
AAA
AAA
AAA
F0
80
80
Chip Erase
AAA
AAA
AA
AA
555
555
55
55
AAA
SA
10
30
Sector Erase
Program/Erase Suspend (Note 14)
Program/Erase Resume (Note 15)
CFI Query (Note 16)
Legend:
X = Don’t care
RA = Read Address of memory location to be read.
RD = Read Data read from location RA during read operation.
PA = Program Address. Addresses latch on falling edge of WE# or
CE# pulse, whichever happens later.
PD = Program Data for location PA. Data latches on rising edge of
WE# or CE# pulse, whichever happens first.
SA = Sector Address of sector to be verified (in autoselect mode) or
erased. Address bits A21–A15 uniquely select any sector.
WBL = Write Buffer Location. Address must be within same write
buffer page as PA.
BC = Byte Count. Number of write buffer locations to load minus 1.
Notes:
1.
2.
3.
4.
See
Table 1 on page 22
for description of bus operations.
All values are in hexadecimal.
Shaded cells indicate read cycles. All others are write cycles.
During unlock and command cycles, when lower address bits are
555 or AAA as shown in table, address bits above A11 are don’t
care.
Unless otherwise noted, address bits A21–A11 are don’t cares.
No unlock or command cycles required when device is in read
mode.
Reset command is required to return to read mode (or to erase-
suspend-read mode if previously in Erase Suspend) when device
is in autoselect mode, or if DQ5 goes high while device is
providing status information.
Fourth cycle of autoselect command sequence is a read cycle.
Data bits DQ15–DQ8 are don’t care. See
Autoselect Command
Sequence
section or more information.
Device ID must be read in three cycles.
5.
6.
7.
8.
9.
10. If WP# protects highest address sector, data is 98h for factory
locked and 18h for not factory locked. If WP# protects lowest
address sector, data is 88h for factory locked and 08h for not
factor locked.
11. Data is 00h for an unprotected sector group and 01h for a
protected sector group.
12. Total number of cycles in command sequence is determined by
number of bytes written to write buffer. Maximum number of
cycles in command sequence is 37, including “Program Buffer to
Flash” command.
13. Command sequence resets device for next command after
aborted write-to-buffer operation.
14. System may read and program in non-erasing sectors, or enter
autoselect mode, when in Erase Suspend mode. Erase Suspend
command is valid only during a sector erase operation.
15. Erase Resume command is valid only during Erase Suspend
mode.
16. Command is valid when device is ready to read array data or
when device is in autoselect mode.
17. Refer to
Table 18 on page 80
, AutoSelect Codes for individual
Device IDs per device density and model number.
相關(guān)PDF資料
PDF描述
S29GL032M10FBCR50 MirrorBit Flash Family
S29GL064N11FFIV20 64 Megabit, 32 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 110 nm MirrorBit Process Technology
S29GL064N11BFIV22 64 Megabit, 32 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 110 nm MirrorBit Process Technology
S29GL064N11BFIV60 64 Megabit, 32 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 110 nm MirrorBit Process Technology
S29GL064N11BFIV62 64 Megabit, 32 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 110 nm MirrorBit Process Technology
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S29GL032M10BFIR52 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
S29GL032M10BFIR53 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
S29GL032M10BFIR60 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
S29GL032M10BFIR62 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
S29GL032M10BFIR63 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
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