參數(shù)資料
型號(hào): S29AL016M90FAI020
廠商: SPANSION LLC
元件分類: DRAM
英文描述: Hex Schmitt Trigger; Package: SOEIAJ-14; No of Pins: 14; Container: Rail; Qty per Container: 50
中文描述: 1M X 16 FLASH 3V PROM, 90 ns, PBGA64
封裝: 13 X 11 MM, FBGA-64
文件頁(yè)數(shù): 52/59頁(yè)
文件大?。?/td> 1917K
代理商: S29AL016M90FAI020
53
S29AL016M
S29AL016M_00A4 April 21, 2004
Erase and Programming Performance
Notes:
1. Typical program and erase times assume the following conditions: 25
°
C, V
CC
= 3.0 V, 10,000 cycles, checkerboard data
pattern.
2. Under worst case conditions of 90°C, V
CC
= 2.7 V, 100,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes
program faster than the maximum program times listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See
Tables
2
3
for further information on command definitions.
TSOP Pin and BGA Package Capacitance
Notes:
1. Sampled, not 100% tested.
2. Test conditions T
A
= 25°C, f = 1.0 MHz.
Parameter
Typ (Note 1)
Max (Note 2)
Unit
Comments
Sector Erase Time
0.7
7.5
s
Excludes 00h programming
prior to erasure (Note 4)
Chip Erase Time
32
s
Byte Programming Time
18
μs
Word Programming Time
18
μs
Excludes system level
overhead (Note 5)
Chip Programming Time
(Note 3)
Byte Mode
36
s
Word Mode
19
s
Parameter Symbol
Parameter Description
Test Setup
Typ
Max
Unit
C
IN
Input Capacitance
V
IN
= 0
TSOP
6
7.5
pF
BGA
4.2
5.0
pF
C
OUT
Output Capacitance
V
OUT
= 0
TSOP
8.5
12
pF
BGA
5.4
6.5
pF
C
IN2
Control Pin Capacitance
V
IN
= 0
TSOP
7.5
9
pF
BGA
3.9
4.7
pF
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