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參數(shù)資料
| 型號： | S25FL004AOLMAI000 |
| 廠商： | Spansion Inc. |
| 英文描述： | 4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| 中文描述： | 4兆位閃存的CMOS 3.0伏，50赫茲SPI總線接口內(nèi)存 |
| 文件頁數(shù)： | 30/39頁 |
| 文件大小： | 945K |
| 代理商： | S25FL004AOLMAI000 |
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28
S25FL Family (Serial Peripheral Interface) S25FL004A
S25FL004A_00_A1 March 28, 2005
A d v a n c e I n f o r m a t i o n
Figure 17. Release from Deep Power Down and Read Electronic Signature (RES) Instruction Sequence
Power-up and Power-down
The device must not be selected at power-up or power-down (that is, CS# must
follow the voltage applied on V
CC
) until V
CC
reaches the correct value as follows:
V
CC
(min) at power-up, and then for a further delay of t
PU
(as described in
Table 7, on page 29
)
V
SS
at power-down
A simple pull-up resistor on Chip Select (CS#) can usually be used to insure safe
and proper power-up and power-down.
The device ignores all instructions until a time delay of t
PU
(as described in
Table 7, on page 29
) has elapsed after the moment that V
CC
rises above the min-
imum V
CC
threshold. However, device correct operation is not guaranteed if by
this time V
CC
is still below V
CC
(min). No Write Status Register, Program, or Erase
instructions should be sent until t
PU
after V
CC
reaches the minimum V
CC
threshold.
At power-up, the device is in Standby mode (not Deep Power Down mode) and
the WEL bit is reset.
Normal precautions must be taken for supply rail decoupling to stabilize the
V
CC(min)
feed. Each device in a system should have the V
CC
rail decoupled by a
suitable capacitor close to the package pins (this capacitor is generally in the
order of 0.1 μF).
At power-down, when V
CC
drops from the operating voltage to below the V
CC(min)
threshold, all operations are disabled and the device does not respond to any in-
structions. (The designer needs to be aware that if a power-down occurs while a
Write, Program, or Erase cycle is in progress, data corruption can result.)
CS#
SCK
SI
SO
3 Dummy
Bytes
High Impedance
MSB
Deep Power Down Mode
Standby Mode
0
1
2
3
4
5
6
7
8
9
10
28 29 30 31 32
33 34 35 36
37 38
Electronic ID out
Instruction
t
RES
23 22 21
3
2
1
0
7
6
5
4
3
2
1
0
MSB
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S25FL004AOLNFI001 | 4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004AOLNFI002 | 4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004AOLNFI003 | 4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004AOLNAI002 | 4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004AOLNAI003 | 4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S25FL004AOLMAI001 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004AOLMAI002 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004AOLMAI003 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004AOLMFI000 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004AOLMFI001 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
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