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參數(shù)資料
| 型號： | S1C63653F |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, CQFP100 |
| 封裝： | CERAMIC, QFP15-100 |
| 文件頁數(shù)： | 116/121頁 |
| 文件大小： | 1127K |
| 代理商： | S1C63653F |
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86
EPSON
S1C63653 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (R/f Converter)
The CR oscillation circuit is designed so that either the reference resistance side or the sensor side can
be operated independently by the oscillation control circuit.
Each circuit performs the same oscillating operation as follows:
VSS
Tr2
Tr1
Tr3
VSS
SEN0(1)
REF0(1)
RFIN0(1)
VDD
Oscillation
control
circuit
RFOUT
Count
clock
Fig. 4.12.2.2 CR oscillation circuit (DC bias)
The Tr1 (Tr2) turns on first, and the capacitor connected between the REF (SEN) and VSS terminals is
charged through the reference resistance (sensor). If the voltage level of the RFIN terminal decreases,
the Tr1 (Tr2) turns off and the Tr3 turns on. As a result, the capacitor becomes discharged, and oscilla-
tion is performed according to CR time constant. The time constant changes as the sensor resistance
value fluctuates, producing a difference from the oscillation frequency of the reference resistance.
Oscillation waveforms are shaped by the schmitt trigger and transmitted to the measurement counter.
The clock transmitted to the measurement counter is also output from the RFOUT terminal while the
sensor is oscillating. As a result, oscillation frequency can be identified by the oscilloscope. Since this
monitor has no effect on oscillation frequency, it can be used to adjust R/f conversion accuracy.
Oscillation waveforms and waveforms output from the RFOUT terminal are shown in Figure 4.12.2.3.
The "L" pulse width of the RFOUT output must be 10 sec or more (when VDD = 3.0 V, RSEN0/1 = 50
k
, CRF = 1000 pF).
RFIN0/1 terminal
RFOUT output
VDD
VSS
VDD
VSS
10
sec or more
Fig. 4.12.2.3 Oscillation waveform
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