S1C62740 TECHNICAL HARDWARE
EPSON
I-77
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Serial Interface)
SCTRG:
Clock trigger
(DCHD0)
This is a trigger to start input/output of synchronous clock.
When "1" is written: Trigger
When "0" is written: No operation
Reading: Always "0"
When this trigger is supplied to the serial interface activating
circuit, the synchronous clock (SCLK) input/output is started.
As a trigger condition, it is required that data writing or reading on
data registers SD0–SD7 be performed prior to writing "1" to
SCTRG. (The internal circuit of the serial interface is initiated
through data writing/reading on data registers SD0–SD7.)
Supply trigger only once every time the serial interface is placed in
the RUN state. Refrain from performing trigger input multiple
times, as leads to malfunctioning.
Moreover, when the synchronous clock SCLK is external clock,
start to input the external clock after the trigger.
SD0–SD3, SD4–SD7:
Serial interface data register
(DDH, DEH)
These registers are used for writing and reading serial data.
During writing operation
When "1" is written: High level
When "0" is written: Low level
Writes serial data will be output to SOUT (P21) terminal. From the
SOUT (P21) terminal, the data converted to serial data as high
(VDD) level bit for bits set at "1" and as low (VSS) level bit for bits set
at "0".
During reading operation
When "1" is read: High level
When "0" is read: Low level
The serial data input from the SIN (P20) terminal can be read by
this register.
The data converted to parallel data, as high (VDD) level bit "1" and
as low (VSS) level bit "0" input from SIN (P20) terminal. Perform
data reading only while the serial interface is halted (i.e., the
synchronous clock is neither being input or output).
At initial reset, these registers will be undefined.
SCRUN:
Serial interface running status
(DCHD1)
Indicates the running status of the serial interface.
When "1" is read: RUN status
When "0" is read: STOP status
Writing : Invalid
The RUN status is indicated from immediately after "1" is written to
SCTRG bit through to the end of serial data input/output.