參數(shù)資料
型號: S-29355A
廠商: Seiko Instruments Inc.
英文描述: CMOS 4Kbit Serial EEPROM(4K位 CMOS 串行EEPROM)
中文描述: 4Kbit的CMOS串行EEPROM(4K的位的CMOS串行EEPROM的)
文件頁數(shù): 8/40頁
文件大?。?/td> 166K
代理商: S-29355A
CMOS 2K/4K-bit SERIAL E
2
PROM
S-29255A/29355A
Seiko Instruments Inc.
7
3.
Program enable (EWEN) and program disable (EWDS) modes
EWEN enables the write operation, and EWDS disables the write operation. The status to enable the write operation is called
the program enable mode, and the status to disable the write operation is called the program disable mode. The S-
29255A/29355A is in program disable mode when the power is turned on.
To prevent unexpected erroneous writing because of noise and CPU runaway, the S-29255A/29355A should be in program
disable mode when writing is not performed.
4.
Status output
The status output instruction outputs several kinds of IC inside status (ready/busy, write inhibit/permit, and ECC set). Through
the status output instruction, the op code and flag set code are latched, synchronized with the rise of SK. At the falling edge of
16th clock cycle from the start bit, DO is changed from high impedance (Hi-Z) status to data output status, and the data that
shows the IC inside status is output synchronized with the fall of SK. The data is retained until CS goes to “H”.
NOTE : Even if the SK and DI inputs are changed when outputting data, the output data is not changed.
Figure 10
5.
Reset operation
After RESET goes to “H” during the write operation, the write operation is terminated. At that time, only READ, EWEN, EWDS,
and the status output instruction can be performed.
Although RESET can be connected with CS, RESET must be fixed at “L” during writing. If RESET goes to “H” during writing, for
0.1 ms from the rise of RESET, no instruction except for status output can be accepted.
Figure 9
*
*
16
15
14
13
12
EWEN
EWDS
1
0
1
0
Hi-Z
4
2
1
11
10
9
8
7
6
5
CS
SK
DI
DO
*
*
*
*
*
*
3
0
1
1
0
0
0
Flag name
Flag set
“L”output
“H”output
Remarks
Write status flag
Write permission flag
00
10
During writing
Program enable
mode
Completed writing
Program disable
mode
ECC flag
01
Showing not
modified
For maintaining compatibility with M6M80021/41,
“L” is always output. Redundant memory is not
included.
Table 10 IC inside status
*
*
15
14
13
12
16
Busy flag
Write permission
ECC flag
0
1
0
0
0
1
Hi-Z
4
2
1
11
10
9
8
7
6
5
CS
SK
DI
DO
*
*
*
*
3
0
1
1
0
0
1
0
1
t
HZ
Status output
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