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| 型號： | RTL8316 |
| 英文描述： | Specifications |
| 中文描述： | 規(guī)格 |
| 文件頁數(shù)： | 13/22頁 |
| 文件大?。?/td> | 375K |
| 代理商： | RTL8316 |
RTL8316
2001/11/09
Rev.1.72
13
6.10 Buffer Management
An embedded 4M bit (512K Bytes) DRAM is built-in as a packet storage buffer. To efficiently utilize the packet buffer, the
RTL8316 divides the 4Mbit (512 Kbytes) DRAM into 2K pages of storage spaces, i.e., per page contains 256 bytes. For
Ethernet packets, a maximum of seven pages can be used and the minimum is one.
The embedded DRAM is divided into two parts. The first is the Packet Buffer Space, used for storing received packet data. The
second is Page Pointer Space for buffer management. The Packet Buffer Space consists of about 2k storage units in a page.
Each page consists of 16-byte Header information, including next page pointer and received byte count, and 240 bytes of data.
The page pointers are contained in Page Pointer Space.
Packet Buffer Space
(about 2K pages)
Page Pointer Space
4M bit DRAM
6.11 Buffer Manager
The Buffer Manager of the RTL8316 contains a Free Page Pointer FIFO pool to store and provide available free page pointers
to all ports. After power up reset, the Buffer Manager will initiate the
Descriptor Read
command to get some available free
page pointers from Page Pointer Space. When the contents of the Free Page Pointer FIFO is almost empty due to continuous
data receptions, the Descriptor Read command will be reinitiated to get more available free page pointers. However, when the
FIFO contents is almost full due to continuous successful data transmissions, the RTL8316 initiates the
Descriptor Write
command to write the additional available free page pointers back to Page Pointer Space.
6.12 Data Reception
Each port contains a Receive Data FIFO and a Receive Free Page Pointer FIFO. Initially the Free Page Pointer FIFO is filled
with free page pointers received from the Buffer Manager. On reception of a packet, the received data flows into the Receive
Data FIFO first and then is moved into the Packet Buffer by the Receive DMA Engine, using the free page pointers in the
Receive Free Page Pointer FIFO via the
Get Free Page
command. The RTL8316 always attempts to fill the Receive Free Page
Pointer FIFO with free page pointers.
6.13 Data Forwarding
Each port also contains a Transmit Data FIFO, a Transmit Free Page Pointer FIFO and a Transmit Start Address Queue. Once
a forwarding condition is met (for store-and-forward mode a packet is completely received) the receiving port will pass the
beginning page pointer using the Send TX Descriptor command to the transmit port and start the Transmit DMA. The
transmission port stores the beginning page pointer in the Transmit Start address Queue. The Transmit DMA moves data from
the Packet Buffer through the Transmit Data FIFO and to the RMII interface using the free page pointer in the Transmit Free
Page Pointer FIFO. Once the packet has been forwarded successfully, the RTL8316 uses the Put Free Page command to put
related free page pointers back to buffer manager's Free Page Pointer FIFO.
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