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參數(shù)資料
| 型號： | RTL8100B(L) |
| 英文描述： | RTL8100B(L) Specification |
| 中文描述： | RTL8100B（長）規(guī)格 |
| 文件頁數(shù)： | 19/58頁 |
| 文件大小： | 616K |
| 代理商： | RTL8100B(L) |
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RTL8100B(L)
2001-11-9
Rev.1.41
19
5.9 9346CR: 93C46 Command Register
(Offset 0050h, R/W)
This register is used for issuing commands to the RTL8100B(L). These commands are issued by setting the corresponding bits for
the function. A warm software reset along with individual reset and enable/disable for transmitter and receiver are provided as well.
Bit
7-6
R/W
R/W
Symbol
EEM1-0
Description
Operating Mode:
These 2 bits select the RTL8100B(L) operating mode.
EEM1
0
EEM0
0
Operating Mode
Normal:
RTL8100B(L) network/host communication
mode.
Auto-load:
Entering this mode will make the
RTL8100B(L) load the contents of 93C46 like when the
RSTB signal is asserted. This auto-load operation will take
about 2 ms. After it is completed, the RTL8100B(L) goes
back to the normal mode automatically (EEM1 = EEM0 =
0) and all the other registers are reset to default values.
93C46 Programming:
In this mode, both network and
host bus master operations are disabled. The 93C46 can
be directly accessed via bit3-0 which now reflect the
states of EECS, EESK, EEDI, & EEDO pins respectively.
Config Register Write Enable:
Before writing to
CONFIG0, 1, 3, 4 registers, and bit13, 12, 8 of
BMCR(offset 62h-63h), the RTL8100B(L) must be
placed in this mode. This will prevent RTL8100B(L)'s
configurations from accidental change.
0
1
1
0
1
1
4-5
3
2
1
0
-
-
Reserved
These bits reflect the state of EECS, EESK, EEDI & EEDO pins in
auto-load or 93C46 programming mode.
R/W
R/W
R/W
R
EECS
EESK
EEDI
EEDO
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