參數(shù)資料
型號: RT9210GC
廠商: Richtek Technology Corporation
英文描述: Dual 5V Synchronous Buck DC-DC PWM Controller for DDR Memory VDDQ and VTT Termination
中文描述: 雙5V的同步降壓型DC - DC PWM控制器,用于DDR內存VDDQ和VTT終端
文件頁數(shù): 4/17頁
文件大小: 360K
代理商: RT9210GC
RT9210
Preliminary
DS9210-05 March 2007
4
www.richtek.com
MOSFET
upper
the
of
R
40uA
I
DS(ON)
OCSET
OCSET
R
×
=
NC (Pin 10 , 16 , 18)
No internal connection.
SENSE2 (Pin 17)
This pin is connected directly to the regulated output of
V
TT
supply. This pin is also used as the feedback pin of
the V
TT
regulator and as the regulation point for the window
regulator that is enable in V2_SD mode.
PGOOD (Pin 19)
PGOOD is an open-drain output used to indicate that both
the V
DDQ
and V
TT
regulators are within normal operating
voltage ranges.
V2_SD (Pin 20)
A TTL compatible high level at this pin puts the V
TT
controller into
sleep
mode. In sleep mode, both UGATE2
and LGATE2 are driven low, effectively floating the V
TT
supply. While the V
TT
supply
floats
, it is held to about
50% of V
DDQ
via a low current window regulator which
drivers V
TT
via the SENSE2 pin. The window regulator
can overcome up to at least
±
10mA of leakage on V
TT
.
While V2_SD is high, PGOOD is low.
OCSET/SD (Pin 21)
Connect a resistor (R
OCSET
) from this pin to the drain of
the upper MOSFET of the V
DDQ
regulator sets the over-
current trip point. R
OCSET
, an internal 40
μ
A current source
, and the upper MOSFET on-resistance, R
DS(ON)
, set the
V
DDQ
converter over-current trip point (I
OCSET
) according
to the following equation:
An over-current trip cycles the soft-start function. Pulling
the pin to ground resets the device and all external
MOSFETs are turned off allowing the two output voltage
power rails to float.
PVCC1 (Pin 22)
Connect this pin to a well-decoupled 5V supply. It is also
the positive supply for the lower gate driver, LGATE1.
LGATE1 (Pin 23)
V
DDQ
lower gate drive output. Connect to gate of the low-
side power N-MOSFET. This pin is monitored by the
adaptive shoot-through protection circuitry to determine
when the lower MOSFET has turned off.
PGND1 (Pin 24)
Return pin for high currents flowing in low-side power
N-MOSFET. Ties the pin directly to the low-side MOSFET
source and ground plane with the lowest impedance.
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