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參數(shù)資料
| 型號(hào)： | RT9206GS |
| 廠商： | Richtek Technology Corporation |
| 英文描述： | High Efficiency, Synchronous Buck with Dual Linear Controllers |
| 中文描述： | 高效率，雙直線同步降壓控制器 |
| 文件頁數(shù)： | 18/21頁 |
| 文件大小： | 351K |
| 代理商： | RT9206GS |
RT9206
18
DS9206-11 March 2007
www.richtek.com
Figure 8. The Bode plot of desired loop gain and phase
margin
Where the f
C
is zero crossover frequency defined as the
frequency when the loop gain equals unity. Typically, f
C
be
chosen in range 1/10 ~ 1/20 of switching frequency. f
C
determines how fast the dynamic load response is. The
higher f
C
with the faster dynamic response, and the phase
margin in the range of 45
°
~ 60
°
is desirable.
So, the transfer function of compensator C(s) must be
designed to meet these requirements. In many applications,
use an electrolytic capacitor as the output capacitor, if the
zero (f
Z
) caused by effective series resistance (ESR) of
capacitor is a few kHz and smaller than 8 times f
P
, the
type 2 (PI) can be used to get desired compensation. Figure
9 shows the typical type 2 trans-conductance error
amplifier and the Bode plot is also shown in Figure 10.
Figure 9. The typical type 2 trans-conductance error
amplifier.
Figure 10. The Bode plot of type 2 trans-conductance
error amplifier
+
-
V
OUT
V
REF
Vc
Cc2
Cc1
Rc1
Rb
Ra
gm
VIN/Vr
Gain
Phase
f
f
fp
fz
0
°
-180
°
-90
°
f
fc
Desired
loop gain
Power
stage
Phase
margin
G(s)
TL(s)
Gain(dB)
Phase
gmRc1
-90
f
f
fcz
fcp
Boost
The effective series resistance (ESR) of capacitor and
capacitance introduces one zero into system, the zero is
given as :
p
(Hz) (22)
rc x
x
2
In the voltage-mode Buck converter shown in Figure 5, the
loop gain of system is
1
x
C
T
(23)
P(S)
(S)
L(S)
H
x
G
x
Vr
The desired loop gain and phase margin is show in the
Bode plot of Figure 8.
O
C
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| RT9209GS | 制造商:RICHTEK 制造商全稱:Richtek Technology Corporation 功能描述:Synchronous Buck PWM DC-DC with Enable & PGOOD |
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