參數(shù)資料
型號(hào): RT9206GS
廠商: Richtek Technology Corporation
英文描述: High Efficiency, Synchronous Buck with Dual Linear Controllers
中文描述: 高效率,雙直線同步降壓控制器
文件頁(yè)數(shù): 14/21頁(yè)
文件大?。?/td> 351K
代理商: RT9206GS
RT9206
14
DS9206-11 March 2007
www.richtek.com
The AC impedance of output capacitor at operating
frequency is quite smaller than the load impedance, so
the ripple current (
I
L
) of the inductor current flows mainly
through output capacitor. The output ripple voltage is
described as :
(2)
(3)
OUT
L
(4)
where
V
OR
is caused by ESR and
V
OC
by capacitance.
For electrolytic capacitor application, typically 90~95% of
the output voltage ripple is contributed by the ESR of output
capacitor. So Equation (4) could be simplified as :
(5)
Users could connect capacitors in parallel to get calculated
ESR.
Input Capacitor Selection
The selection of input capacitor is mainly based on its
maximum ripple current capability. The buck converter
draws pulsewise current from the input capacitor during
the on time of S1 as shown in Figure 1. The RMS value of
ripple current flowing through the input capacitor is
described as :
(A) (6)
rms
O
The input capacitor must be cable of handling this ripple
current. Sometime, for higher efficiency the low ESR
capacitor is necessarily.
Power MOSFET Selection
The selection of MOSFETs is based on consideration of
maximum gate-source voltage (Vgs), drain-source voltage
(Vdss), maximum drain current (Id), drain-source on-state
resistance R
ds(on)
and thermal management. The MOSFETs
are driven by V
INT
that is internally regulated as 6.0V. Low
threshold voltage MOSFET should be selected to guarantee
that it could fully turn on at Vgs = 6.0V.
The total power dissipation of external MOSFETs consists
of conduction and switching losses. The conduction losses
of high-side and low-side MOSFETs are described by
equation (7) and (8), respectively.
(High-side MOSFET)
(W) (7)
H- con
(Low-side MOSFET)
(W) (8)
L - con
P
=I
(1-D) R
Where
Figure 2. The related waveforms of output capacitor.
C
1
Co
2
O
8 C L
×
ds(on)
r
×
ds(on)
r
is temperature dependency of R
ds(on)
The total switching loss is approximated as.
Psw =I
OUT
2
Where
V
ds(off)
is voltage from drain to source at MOSFET
off time.
t
r
and t
f
are rise-time and fall-time, respectively.
I
OUT
= Load current
f
s
= Switching frequency
×
Vds(off)
(tr +tf) fs
I
O
L
d
dt
=
dt
d
i
L
L
V
OUT
=
V
OR
i
L
i
c
iL
Δ
I
L
1/2
0
0
Δ
I
L
x r
c
V
OC
t1
t2
Δ
V
OC
Δ
I
L
V
IN
-V
OUT
T
S
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