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參數(shù)資料
| 型號： | RF-3000PCBA |
| 廠商： | RF Micro Devices, Inc. |
| 英文描述： | SPREAD-SPECTRUM BASEBAND MODEM |
| 中文描述： | 擴譜基帶調(diào)制解調(diào)器 |
| 文件頁數(shù)： | 3/28頁 |
| 文件大小： | 351K |
| 代理商： | RF-3000PCBA |
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11-323
RF3000
Rev A4 031216
Notes:
1. AC tests performed with C
L
=20pF, I
OL
=2mA, and I
OH
=-1mA. Input reference level all inputs V
CC
/2. Test V
IH
=V
CC
,
V
IL
=0V; V
OH
=V
OL
=V
CC
/2.
2. Not tested, but characterized at initial design and at major process/design changes.
3. Measured from V
IL
to V
IH
.
4. TX PE must be inactive before going active to generate a new packet.
5. I
OUT
/Q
OUT
are modulated after last chip of valid data to provide ramp-down time for RF/IF circuits.
6. A new search will begin after last bit of 802.11 packet in 802.11 modes.
7. Centered about 1.7V V
REF
.
8. Accurate to within ±3dB of final gain setting.
Parameter
Specification
Typ.
Unit
Condition
Min.
Max.
I/Q ADC
Full Scale Input Voltage
Input Bandwidth
Input Capacitance
Input Impedance
I/Q DAC
Full Scale Output Voltage
Sample Rate
Resolution
DNL
INL
TX VGC DAC
Maximum Gain Output Voltage
Minimum Gain Output Voltage
Resolution
DNL
INL
RX VGC DAC
Maximum Gain Output Voltage
Minimum Gain Output Voltage
Resolution
DNL
INL
Control Port Timing
Characteristics
0.7
11
5
+10%
V
P-P
MHz
pF
k
See Note 7.
50
200
11
6
0.5
0.5
mV
MHz
bits
LSB
LSB
See Note 7.
1.0
Tested for monotonicity.
1.2
2.0
6
0.5
0.5
V
V
bits
LSB
LSB
1.0
Tested for monotonicity.
1.2
2.0
6
0.5
0.5
V
V
bits
LSB
LSB
1.0
Tested for monotonicity.
SPI Mode
Mode Switching Characteristics.
See Figure 3.
f
CLK
t
CSH
C CLK Clock Frequency
CS High Time Between
Transmissions
CS Falling to C CLK Edge
C CLK Low Time
C CLK High Time
CD IN to C CLK Setup Time
C CLK Rising to Data Hold Time
C CLK Falling to CD OUT Stable
6
MHz
μ
S
1.1
22
68
68
42
16
nS
nS
nS
nS
nS
nS
t
CSS
t
CLKL
t
CLKH
t
DSU
t
DHLD
t
PD
47
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