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參數(shù)資料
| 型號(hào)： | RD74LVC273BTELL |
| 元件分類： | 鎖存器 |
| 英文描述： | LVC/LCX/Z SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20 |
| 封裝： | TSSOP-20 |
| 文件頁數(shù)： | 5/9頁 |
| 文件大?。?/td> | 81K |
| 代理商： | RD74LVC273BTELL |
RD74LVC273B
Rev.1.00 Jun. 16, 2004 page 5 of 8
Switching Characteristics
Ta = –40 to 85°C
Item
Symbol
VCC (V)
Min
Typ
Max
Unit
FROM
(Input)
TO
(Output)
1.8±0.15
—
55.0
2.5±0.2
—
95.0
2.7
—
150.0
3.3±0.3
—
150.0
Maximum clock
frequency
fmax
5.0±0.5
—
150.0
MHz
1.8±0.15
1.0
—
21.6
2.5±0.2
1.0
—
10.5
2.7
1.0
—
8.5
3.3±0.3
1.5
—
7.5
tPLH
tPHL
5.0±0.5
1.0
—
6.0
ns
CLK
Q
1.8±0.15
1.0
—
21.6
2.5±0.2
1.0
—
10.5
2.7
1.0
—
8.5
3.3±0.3
2.0
—
7.5
Propagation delay time
tPHL
5.0±0.5
1.0
—
6.0
ns
CLR
Q
1.8±0.15
6.0
—
2.5±0.2
4.0
—
2.7
2.0
—
3.3±0.3
2.0
—
Setup time
tSU
5.0±0.5
2.0
—
ns
1.8±0.15
4.0
—
2.5±0.2
2.0
—
2.7
1.5
—
3.3±0.3
1.5
—
Hold time
th
5.0±0.5
1.5
—
ns
1.8±0.15
9.0
—
2.5±0.2
4.0
—
2.7
3.3
—
3.3±0.3
3.3
—
Pulse width
tW
5.0±0.5
3.3
—
ns
1.8±0.15
—
2.5±0.2
—
2.7
—
3.3±0.3
—
1.0
Between output pins
skew*
1
tOSLH
tOSHL
5.0±0.5
—
1.0
ns
Input capacitance
CIN
3.3
—
4.0
—
pF
Output capacitance
CO
3.3
—
8.0
—
pF
Note:
1. This parameter is characterized but not tested.
tOSLH = |tPLHm – tPLHn|, tOSHL = |tPHLm – tPHLn|
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