參數(shù)資料
型號(hào): RC28F256P33T85A
廠商: NUMONYX
元件分類: PROM
英文描述: 16M X 16 FLASH 3V PROM, 85 ns, PBGA64
封裝: BGA-64
文件頁數(shù): 63/96頁
文件大小: 1378K
代理商: RC28F256P33T85A
Numonyx StrataFlash Embedded Memory (P33)
Datasheet
November 2007
66
Order Number: 314749-05
11.4.7
Selectable One-Time Programmable Blocks
Blocks from the main array may be optionally configured as OTP. Ask your local
Numonyx representative for details about any of the following selectable OTP
implementations.
11.4.7.1
Permanent Block Locking of up to 512 KB
Any of four pre-defined areas from the main array (the four 32-KB parameter blocks
together as one and three adjacent 128 KB main blocks) can be configured as One-
Time Programmable (OTP) so further program and erase operations are not allowed.
This option is available for top or bottom parameter devices.
11.4.7.2
Permanent Block Locking of up to Full Main Array
This option allows all main blocks (plus the four 32-KB parameter blocks together as
one block) to be configured as OTP to prevent further program and erase operations.
This option is available for top or bottom parameter devices.
Ask your local Numonyx representative for details about either of these Selectable OTP
implementations.
11.4.8
Protection Registers
The device contains 17 Protection Registers (PR) that can be used to implement system
security measures and/or device identification. Each Protection Register can be
individually locked.
Table 32: Selectable 512 KB OTP Block Mapping
Density
Top Parameter Configuration
Bottom Parameter Configuration
256-Mbit
blocks 258:255 (parameters)
blocks 3:0 (parameters)
block 254 (main)
block 4 (main)
block 253 (main)
block 5 (main)
block 252 (main)
block 6 (main)
128-Mbit
blocks 130:127 (parameters)
blocks 3:0 (parameters)
block 126 (main)
block 4 (main)
block 125 (main)
block 5 (main)
block 124 (main)
block 6 (main)
64-Mbit
blocks 66:63 (parameters)
blocks 3:0 (parameters)
block 62 (main)
block 4 (main)
block 61 (main)
block 5 (main)
block 60 (main)
block 6 (main)
Notes:
1.
The 512-Mbit devices will have multiple die and selectable OTP areas depending on the placement of the parameter
blocks.
2.
When programming the OTP bits in the protection registers for a Top Parameter Device, the following upper address
bits must also be driven properly: A[Max:17] driven high (VIH) for TSOP and Easy BGA packages, and A[Max:16] driven
high (VIH) for QUAD+ SCSP.
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