參數(shù)資料
型號(hào): R5F5630ADDFB#V0
廠商: Renesas Electronics America
文件頁數(shù): 24/165頁
文件大小: 0K
描述: MCU RX630 768KB FLASH 144-LQFP
產(chǎn)品培訓(xùn)模塊: RX Compare Match Timer
RX DMAC
標(biāo)準(zhǔn)包裝: 1
系列: RX600
核心處理器: RX
芯體尺寸: 32-位
速度: 100MHz
連通性: CAN,EBI/EMI,I²C,LIN,SCI,SPI,USB
外圍設(shè)備: DMA,LVD,POR,PWM,WDT
輸入/輸出數(shù): 117
程序存儲(chǔ)器容量: 768KB(768K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 96K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b,21x12b,D/A 2x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 144-LQFP
包裝: 托盤
R01DS0060EJ0100 Rev.1.00
Page 12 of 168
Sep 13, 2011
RX630 Group
1. Overview
1.4
Pin Functions
Table 1.4 lists the pin functions.
Table 1.4
Pin Functions (1/5)
Classifications
Pin Name
I/O
Description
Power supply
VCC
Input
Power supply pin. Connect it to the system power supply.
VCL
Input
Connect this pin to VSS via a 0.1-
F capacitor. The capacitor
should be placed close to the pin.
VSS
Input
Ground pin. Connect it to the system power supply (0 V).
VBATT
Input
Backup power pin
Clock
XTAL
Output
Pins for a crystal resonator. An external clock signal can be input
through the EXTAL pin.
EXTAL
Input
BCLK
Output
Outputs the external bus clock for external devices.
XCOUT
Output
Input/output pins for the sub-clock oscillator circuit. Connect a
crystal resonator between XCOUT and XCIN.
XCIN
Input
Operating mode control
MD
Input
Pins for setting the operating mode. The signal levels on these pins
must not be changed during operation.
System control
RES#
Input
Reset signal input pin. This LSI enters the reset state when this
signal goes low.
EMLE
Input
Input pin for the on-chip emulator enable signal. When the on-chip
emulator is used, this pin should be driven high. When not used, it
should be driven low.
BSCANP
Input
Boundary scan enable pin. Boundary scan is enabled when this pin
goes high. When not used, it should be driven low.
On-chip emulator
FINEC
Input
Fine interface clock pin
FINED
I/O
Fine interface pin
TRST#
Input
On-chip emulator or boundary scan pins. When the EMLE pin is
driven high, these pins are dedicated for the on-chip emulator.
TMS
Input
TDI
Input
TCK
Input
TDO
Output
TRCLK
Output
This pin outputs the clock for synchronization with the trace data.
TRSYNC#
Output
This pin indicates that output from the TRDATA0 to TRDATA3 pins
is valid.
TRDATA0 to TRDATA3
Output
These pins output the trace information.
Address bus
A0 to A23
Output
Output pins for the address.
Data bus
D0 to D31
I/O
Input and output pins for the bidirectional data bus.
Multiplexed bus
A0/D0 to A15/D15
I/O
Address/data multiplexed bus
Bus control
RD#
Output
Strobe signal which indicates that reading from the external bus
interface space is in progress.
WR#
Output
Strobe signal which indicates that writing to the external bus
interface space is in progress, in 1-write strobe mode.
WR0# to WR3#
Output
Strobe signals which indicate that either group of data bus pins (D7
to D0, D15 to D8, D23 to D16 and D31 to D24) is valid in writing to
the external bus interface space, in byte strobe mode.
BC0# to BC3#
Output
Strobe signals which indicate that either group of data bus pins (D7
to D0, D15 to D8, D23 to D16 and D31 to D24) is valid in access to
the external bus interface space, in 1-write strobe mode.
ALE
Output
Address latch signal when address/data multiplexed bus is
selected.
WAIT#
Input
Input pins for wait request signals in access to the external space.
CS0# to CS7#
Output
Select signals for CS areas.
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