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參數(shù)資料
| 型號(hào)： | PSD954F2V-12JI |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| 中文描述： | Flash在系統(tǒng)可編程ISP的外設(shè)的8位微控制器 |
| 文件頁數(shù)： | 30/94頁 |
| 文件大?。?/td> | 476K |
| 代理商： | PSD954F2V-12JI |
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The
PSD9XX
Functional
Blocks
(cont.)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Sec7_Prot
Sec6_Prot
Sec5_Prot
Sec4_Prot
Sec3_Prot
Sec2_Prot
Sec1_Prot Sec0_Prot
Flash Protection Register
9.1.1.9.2 Reset Instruction – PSD913F2
The Reset instruction consists of one write cycle (see Table 9). It can also be optionally
preceded by the standard two write decoding cycles (writing AAh to 555h and 55h to
AAAh).
The Reset instruction must be executed after:
1. Reading the Flash Protection status or Flash ID
2. When an error condition occurs (DQ5 goes high) during a Flash programming or erase
cycle.
The Reset instruction will reset the Flash to normal Read Mode. It may take the Flash
memory up to few msec to complete the reset cycle.
The Reset instruction is ignored when it is issued during a Flash programming or Bulk
Erase cycle. During Sector Erase cycle, the Reset instruction will abort the on going sector
erase cycle and return the Flash to normal Read Mode in up to few msec.
9.1.1.9.3 Reset Instruction – PSD934F2, PSD954F2
The Reset instruction consists of one write cycle (see Table 9). It can also be optionally
preceded by the standard two write decoding cycles (writing AAh to 555h and 55h to
AAAh).
The Reset instruction must be executed after:
1. Reading the Flash Protection status or Flash ID
2. When an error condition occurs (DQ5 goes high) during a Flash programming or erase
cycle.
The Reset instruction will immediately reset the Flash to normal Read Mode. However,
if there is an error condition (DQ5 goes high), the Flash memory will return to the Read
Mode in 25 μsec after the Reset instruction is issued.
The Reset instruction is ignored when it is issued during a Flash programming or Bulk
Erase cycle. The Reset instruction will abort the on going sector erase cycle and return the
Flash memory to normal Read Mode in 25 μsec.
Bit Definitions:
Sec<i>_Prot
Sec<i>_Prot
Secondary Flash Protection Register
1 = Main Flash Sector <i> is write protected.
0 = Main Flash Sector <i> is not write protected.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Security_
Bit
*
*
*
Sec3_Prot
Sec2_Prot
Sec1_Prot Sec0_Prot
Bit Definitions:
Sec<i>_Prot
Sec<i>_Prot
Security_Bit
1 = Secondary Flash Sector <i> is write protected.
0 = Secondary Flash Sector <i> is not write protected.
0 = Security Bit in device has not been set.
1 = Security Bit in device has been set.
Table 11. Sector Protection/Security Bit Definition
*:
Not used.
PSD9XX Family
Preliminary Information
26
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PSD934F2 | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD934F2-70J | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD934F2-70M | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD934F2-90J | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD934F2-90JI | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD954F2V-90J | 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 2M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| PSD954F2V-90M | 功能描述:SPLD - 簡單可編程邏輯器件 PQFP-52 3V 2M 90NS RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| PS-DA0104-01 | 制造商:POWER-SYSTEMS 制造商全稱:Power Systems GmbH+Co.KG 功能描述:DC-AC INVERTER UNIT 4 W SINGLE OUTPUTS |
| PS-DA0104-01S | 制造商:POWER-SYSTEMS 制造商全稱:Power Systems GmbH+Co.KG 功能描述:DC-AC INVERTER UNIT 4 W SINGLE OUTPUTS |
| PS-DA0105-01 | 制造商:POWER-SYSTEMS 制造商全稱:Power Systems GmbH+Co.KG 功能描述:DC-AC INVERTER UNIT 4 W SINGLE OUTPUTS |
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