參數(shù)資料
型號(hào): PSD934F2-70M
廠商: 意法半導(dǎo)體
英文描述: Flash In-System Programmable ISP Peripherals For 8-bit MCUs
中文描述: Flash在系統(tǒng)可編程ISP的外設(shè)的8位微控制器
文件頁數(shù): 27/94頁
文件大小: 476K
代理商: PSD934F2-70M
Preliminary Information
PSD9XX Family
23
9.1.1.6.2 Data Toggle
(cont.)
It is suggested (as with all Flash memories) to read the location again after the embedded
programming algorithm has completed to compare the byte that was written to Flash with
the byte that was intended to be written.
When using the Data Toggle method after an erase instructin, Figure 4 still applies. DQ6
will toggle until the erase operation is complete. A
1
on DQ5 will indicate a timeout failure
of the erase operation, a
0
indicates no error. The MCU can read any location within the
sector being erased to get DQ6 and DQ5.
PSDsoft will generate ANSI C code functions which implement these Data Toggling
algorithms.
The
PSD9XX
Functional
Blocks
(cont.)
Figure 4. Data Toggle Flow Chart
START
READ
DQ5 & DQ6
NO
YES
NO
YES
YES
NO
=
TOGGLE
DQ5
=1
=
TOGGLE
READ DQ6
FAIL
Program/Erase
Operation Not
Complete, Issue
Reset Instruction
PASS
Program/Erase
Operation is
Complete
相關(guān)PDF資料
PDF描述
PSD934F2-90J Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD934F2-90JI Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD934F2-90M Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD934F2-90MI Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD954F2-70J Flash In-System Programmable ISP Peripherals For 8-bit MCUs
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