參數(shù)資料
型號(hào): PIC18F66J93-I/PT
廠商: Microchip Technology
文件頁數(shù): 6/54頁
文件大小: 0K
描述: IC PIC MCU FLASH 64KX4 64-TQFP
產(chǎn)品培訓(xùn)模塊: PIC18 J Series MCU Overview
標(biāo)準(zhǔn)包裝: 160
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 48MHz
連通性: I²C,LIN,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LCD,LVD,POR,PWM,WDT
輸入/輸出數(shù): 51
程序存儲(chǔ)器容量: 64KB(32K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 3923 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 托盤
PIC18F87J93 FAMILY
DS39948A-page 12
Preliminary
2009 Microchip Technology Inc.
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
RB0/INT0/SEG30
RB0
INT0
SEG30
48
I/O
I
O
TTL
ST
Analog
Digital I/O.
External Interrupt 0.
SEG30 output for LCD.
RB1/INT1/SEG8
RB1
INT1
SEG8
47
I/O
I
O
TTL
ST
Analog
Digital I/O.
External Interrupt 1.
SEG8 output for LCD.
RB2/INT2/SEG9/CTED1
RB2
INT2
SEG9
CTED1
46
I/O
I
O
I
TTL
ST
Analog
ST
Digital I/O.
External Interrupt 2.
SEG9 output for LCD.
CTMU Edge 1 input.
RB3/INT3/SEG10/CTED2
RB3
INT3
SEG10
CTED2
45
I/O
I
O
I
TTL
ST
Analog
ST
Digital I/O.
External Interrupt 3.
SEG10 output for LCD.
CTMU Edge 2 input.
RB4/KBI0/SEG11
RB4
KBI0
SEG11
44
I/O
I
O
TTL
Analog
Digital I/O.
Interrupt-on-change pin.
SEG11 output for LCD.
RB5/KBI1/SEG29
RB5
KBI1
SEG29
43
I/O
I
O
TTL
Analog
Digital I/O.
Interrupt-on-change pin.
SEG29 output for LCD.
RB6/KBI2/PGC
RB6
KBI2
PGC
42
I/O
I
I/O
TTL
ST
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming clock pin.
RB7/KBI3/PGD
RB7
KBI3
PGD
37
I/O
I
I/O
TTL
ST
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming data pin.
TABLE 1-3:
PIC18F6XJ93 (64-PIN DEVICE) PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
TQFP
Legend: TTL = TTL compatible input
CMOS
= CMOS compatible input or output
ST
= Schmitt Trigger input with CMOS levels
Analog = Analog input
I
= Input
O
= Output
P
= Power
OD
= Open-Drain (no P diode to VDD)
Note 1:
Default assignment for CCP2 when the CCP2MX Configuration bit is set.
2:
Alternate assignment for CCP2 when the CCP2MX Configuration bit is cleared.
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