參數(shù)資料
型號: PIC18F66J93-I/PT
廠商: Microchip Technology
文件頁數(shù): 28/54頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 64KX4 64-TQFP
產(chǎn)品培訓(xùn)模塊: PIC18 J Series MCU Overview
標(biāo)準(zhǔn)包裝: 160
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 48MHz
連通性: I²C,LIN,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LCD,LVD,POR,PWM,WDT
輸入/輸出數(shù): 51
程序存儲器容量: 64KB(32K x 16)
程序存儲器類型: 閃存
RAM 容量: 3923 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 托盤
PIC18F87J93 FAMILY
DS39948A-page 32
Preliminary
2009 Microchip Technology Inc.
2.1
A/D Acquisition Requirements
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (CHOLD) must be allowed
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 2-2. The source
impedance (RS) and the internal sampling switch (RSS)
impedance directly affect the time required to charge
the capacitor CHOLD. The sampling switch (RSS)
impedance varies over the device voltage (VDD). The
source impedance affects the offset voltage at the ana-
log input (due to pin leakage current). The maximum
recommended impedance for analog sources is
2.5 k
Ω. After the analog input channel is selected
(changed), the channel must be sampled for at least
the minimum acquisition time before starting a
conversion.
To calculate the minimum acquisition time, Equation 2-1
may be used. This equation assumes that 1/2 LSb error
is used (1,024 steps for the A/D). The 1/2 LSb error is the
maximum error allowed for the A/D to meet its specified
resolution.
Equation 2-3 shows the calculation of the minimum
required acquisition time, TACQ. This calculation is
based
on
the
following
application
system
assumptions:
EQUATION 2-1:
ACQUISITION TIME
EQUATION 2-2:
A/D MINIMUM CHARGING TIME
EQUATION 2-3:
CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME
Note:
When the conversion is started, the
holding capacitor is disconnected from the
input pin.
CHOLD
=25 pF
Rs
=
2.5 k
Ω
Conversion Error
1/2 LSb
VDD
=3V
→ Rss = 2 kΩ
Temperature
=
85
°C (system max.)
TACQ
=
Amplifier Settling Time + Holding Capacitor Charging Time + Temperature Coefficient
=TAMP + TC + TCOFF
VHOLD
=
(VREF – (VREF/2048)) (1 – e(-T
C
/CHOLD(RIC + RSS + RS)))
or
TC
=
-(CHOLD)(RIC + RSS + RS) ln(1/2048)
TACQ
=TAMP + TC + TCOFF
TAMP
=0.2
μs
TCOFF
=
(Temp – 25
°C)(0.02 μs/°C)
(85
°C – 25°C)(0.02 μs/°C)
1.2
μs
Temperature coefficient is only required for temperatures > 25
°C. Below 25°C, TCOFF = 0 ms.
TC
=
-(CHOLD)(RIC + RSS + RS) ln(1/2048)
μs
-(25 pF) (1 k
Ω + 2 kΩ + 2.5 kΩ) ln(0.0004883) μs
1.05
μs
TACQ
=0.2
μs + 1 μs + 1.2 μs
2.4
μs
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