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1996 Microchip Technology Inc.
Preliminary
DS30559A-page 129
PIC16C64X & PIC16C66X
PORTE Register ............................................................. 36
Ports
Parallel Slave Port .................................................. 39
PORTA ..................................................................... 29
PORTB ..................................................................... 32
PORTC ..................................................................... 34
PORTD ..................................................................... 14
PORTE ..................................................................... 14
Power Control/Status Register (PCON) ..................... 61
Power-down Mode (SLEEP) ........................................ 70
Power-on Reset (POR) ................................................. 60
Power-up Timer (PWRT) ............................................... 60
Prescaler .......................................................................... 44
PRO MATE Universal Programmer .......................... 87
Program Memory Organization .................................... 17
PSPMODE bit ........................................................... 35, 36
Q
Quick-Turnaround-Production (QTP) Devices ............ 7
R
RA2 pin ............................................................................. 30
RC Oscillator ................................................................... 58
Reset ................................................................................ 59
RETFIE Instruction ......................................................... 82
RETLW Instruction ......................................................... 82
RETURN Instruction ...................................................... 83
RLF Instruction ................................................................ 83
RRF Instruction ............................................................... 83
S
Serialized Quick-Turnaround-Production (SQTP)
Devices .............................................................. 7
SFR ................................................................................... 74
SFR As Source/Destination .......................................... 74
SLEEP Instruction .......................................................... 83
Software Simulator (MPLAB-SIM) ............................... 89
Special Features of the CPU ........................................ 55
Special Function Registers ..................................... 19, 74
Stack ................................................................................. 27
STATUS Register ........................................................... 21
SUBLW Instruction ......................................................... 84
SUBWF Instruction ......................................................... 84
SWAPF Instruction ......................................................... 85
Switching Prescalers ..................................................... 45
T
Timer Modules
Timer0
Block Diagram ................................................. 41
Counter Mode ................................................. 41
External Clock ................................................. 43
Interrupt ............................................................ 41
Prescaler .......................................................... 44
Section ............................................................. 41
Timer Mode ..................................................... 41
Timing Diagram .............................................. 41
TMR0 register ................................................. 41
Timing Diagrams and Specifications .......................... 98
TMR0 Interrupt ................................................................ 67
TRIS Instruction .............................................................. 85
TRISA ............................................................................... 29
TRISB ............................................................................... 32
TRISC Register .............................................................. 34
TRISD Register .............................................................. 35
TRISE Register ............................................................... 36
V
Voltage Reference Module ........................................... 53
VRCON Register ............................................................ 53
W
Watchdog Timer (WDT) ................................................ 69
X
XORLW Instruction ........................................................ 85
XORWF Instruction ........................................................ 85
LIST OF EXAMPLES
Example 3-1:Instruction Pipeline Flow ............................... 15
Example 4-1:Indirect Addressing........................................ 28
Example 5-1:Initializing PORTA ......................................... 29
Example 5-2:Initializing PORTC ......................................... 34
Example 5-3:Read-Modify-Write Instructions on an
I/O Port .......................................................... 38
Example 6-1:Changing Prescaler (Timer0
→WDT)............. 45
Example 6-2:Changing Prescaler (WDT
→Timer0)............. 45
Example 7-1:Initializing Comparator Module ...................... 49
Example 8-1:Voltage Reference Configuration .................. 54
Example 9-1:Saving the STATUS and W Registers in
RAM............................................................... 68
LIST OF FIGURES
Figure 3-1:
PIC16C641/642 Block Diagram..................... 10
Figure 3-2:
PIC16C661/662 Block Diagram..................... 11
Figure 3-3:
Clock/Instruction Cycle .................................. 15
Figure 4-1:
PIC16C641/661 Program Memory Map and
Stack.............................................................. 17
Figure 4-2:
PIC16C642/662 Program Memory Map and
Stack.............................................................. 17
Figure 4-3:
PIC16C641/661 Data Memory Map .............. 18
Figure 4-4:
PIC16C642/662 Data Memory Map .............. 19
Figure 4-5:
STATUS Register (Address 03h, 83h) .......... 21
Figure 4-6:
OPTION Register (address 81h) ................... 22
Figure 4-7:
INTCON Register (address 0Bh, 8Bh) .......... 23
Figure 4-8:
PIE1 Register (address 8Ch)......................... 24
Figure 4-9:
PIR1 Register (address 0Ch) ........................ 25
Figure 4-10: PCON Register (Address 8Eh)...................... 26
Figure 4-11: Loading Of PC In Different Situations............ 27
Figure 4-12: Direct/indirect Addressing.............................. 28
Figure 5-1:
Block Diagram of RA1:RA0 Pins ................... 29
Figure 5-2:
Block Diagram of RA2 Pin ............................. 30
Figure 5-3:
Block Diagram of RA3 Pin ............................. 30
Figure 5-4:
Block Diagram of RA4 Pin ............................. 31
Figure 5-5:
Block Diagram of RB7:RB4 Pins ................... 32
Figure 5-6:
Block Diagram of RB3:RB0 Pins ................... 32
Figure 5-7:
PORTC Block Diagram (in I/O port Mode) .... 34
Figure 5-8:
PORTD Block Diagram (in I/O Port Mode) .... 35
Figure 5-9:
TRISE Register (Address 89h) ...................... 36
Figure 5-10: PORTE Block Diagram (in I/O Port Mode) .... 37
Figure 5-11: Successive I/O Operation.............................. 38
Figure 5-12: PORTD and PORTE as a Parallel Slave Port 39
Figure 6-1:
Timer0 Block Diagram ................................... 41
Figure 6-2:
Timer0 Timing: Internal Clock/No Prescaler.. 41
Figure 6-3:
Timer0 Timing: Internal Clock/Prescale 1:2... 42