參數(shù)資料
型號: PIC16LC556-04/SS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO20
封裝: 0.209 INCH, PLASTIC, SSOP-20
文件頁數(shù): 19/104頁
文件大?。?/td> 697K
代理商: PIC16LC556-04/SS
1996 Microchip Technology Inc.
Preliminary
DS40143A-page 21
PIC16C55X
5.0
I/O PORTS
The PIC16C55X have two ports, PORTA and PORTB.
5.1
PORTA and TRISA Registers
PORTA is a 5-bit wide latch. RA4 is a Schmitt Trigger
input and an open drain output. Port RA4 is multiplexed
with the T0CKI clock input. All other RA port pins have
Schmitt Trigger input levels and full CMOS output drivers.
All pins have data direction bits (TRIS registers) which
can congure these pins as input or output.
A '1' in the TRISA register puts the corresponding output
driver in a hi- impedance mode. A '0' in the TRISA register
puts the contents of the output latch on the selected pin(s).
Reading the PORTA register reads the status of the
pins, whereas writing to it will write to the port latch. All
write operations are read-modify-write operations. So a
write to a port implies that the port pins are rst read,
then this value is modied and written to the port data
latch.
FIGURE 5-1:
BLOCK DIAGRAM OF
PORT PINS RA<3:0>
Note:
On reset, the TRISA register is set to all inputs.
Data
bus
Q
D
Q
CK
Q
D
Q
CK
QD
EN
P
N
WR
Port
WR
TRIS
Data Latch
TRIS Latch
RD TRIS
RD PORT
Schmitt
input
buffer
VSS
VDD
I/O pin
Trigger
FIGURE 5-2:
BLOCK DIAGRAM OF RA4 PIN
Data
bus
WR
PORT
WR
TRIS
RD PORT
Data Latch
TRIS Latch
RD TRIS
Schmitt
Trigger
input
buffer
N
VSS
I/O pin(1)
TMR0 clock input
Note 1: I/O pin has protection diodes to VSS only.
Q
D
Q
CK
Q
D
Q
CK
EN
QD
EN
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