參數(shù)資料
型號: PIC16C710-20/P
廠商: Microchip Technology
文件頁數(shù): 66/177頁
文件大?。?/td> 0K
描述: IC MCU OTP 512X14 A/D 18DIP
產(chǎn)品培訓模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝: 25
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
外圍設備: 欠壓檢測/復位,POR,WDT
輸入/輸出數(shù): 13
程序存儲器容量: 896B(512 x 14)
程序存儲器類型: OTP
RAM 容量: 36 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 18-DIP(0.300",7.62mm)
包裝: 管件
配用: ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING
309-1059-ND - ADAPTER 18 ZIF BD W/18SO PLUGS
DVA16XP180-ND - ADAPTER DEVICE FOR MPLAB-ICE
AC164010-ND - MODULE SKT PROMATEII DIP/SOIC
158
7593L–AVR–09/12
AT90USB64/128
Table 16-5 shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to fast PWM
mode.
Note:
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See “Fast PWM mode” on page 151
for more details.
Table 16-6 shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to phase cor-
rect PWM mode.
Note:
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See “Phase correct PWM mode” on
page 153 for more details.
Bits 3, 2 – Res: Reserved bits
These bits are reserved bits in the Atmel AT90USB64/128 and will always read as zero.
Bits 1:0 – WGM21:0: Waveform Generation mode
Combined with the WGM22 bit found in the TCCR2B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see Table 16-7. Modes of operation supported by the Timer/Counter
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of
Pulse Width Modulation (PWM) modes (see “Modes of operation” on page 150).
Table 16-5.
Compare Output mode, fast PWM mode (1).
COM2B1
COM2B0
Description
0
Normal port operation, OC2B disconnected.
01
Reserved
1
0
Clear OC2B on Compare Match, set OC2B at TOP
1
Set OC2B on Compare Match, clear OC2B at TOP
Table 16-6.
Compare Output mode, phase correct PWM mode (1).
COM2B1
COM2B0
Description
0
Normal port operation, OC2B disconnected
01
Reserved
10
Clear OC2B on Compare Match when up-counting. Set OC2B on Compare
Match when down-counting
11
Set OC2B on Compare Match when up-counting. Clear OC2B on Compare
Match when down-counting
Table 16-7.
Waveform Generation mode bit description.
Mode
WGM2
WGM1
WGM0
Timer/Counter
mode of operation
TOP
Update of
OCRx at
TOV flag
set on
0
Normal
0xFF
Immediate
MAX
1
0
1
PWM, phase correct
0xFF
TOP
BOTTOM
2
0
1
0
CTC
OCRA
Immediate
MAX
3
0
1
Fast PWM
0xFF
TOP
MAX
4
100
Reserved
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