1997 Microchip Technology Inc.
DS30272A-page 13
PIC16C71X
FIGURE 4-5:
PIC16C711 REGISTER FILE
MAP
INDF(1)
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PCLATH
INTCON
ADRES
ADCON0
INDF(1)
OPTION
PCL
STATUS
FSR
TRISA
TRISB
PCLATH
INTCON
ADCON1
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
General
Purpose
Register
7Fh
FFh
Bank 0
Bank 1
File
Address
ADRES
4Fh
50h
CFh
D0h
File
Address
General
Purpose
Register
Mapped
in Bank 0(2)
PCON
Unimplemented data memory locations, read
as '0'.
Note 1:
Not a physical register.
2:
These locations are unimplemented in Bank 1.
Any access to these locations will access the
corresponding Bank 0 register.
FIGURE 4-6:
PIC16C715 REGISTER FILE
MAP
INDF(1)
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PCLATH
INTCON
PIR1
ADRES
ADCON0
INDF(1)
OPTION
PCL
STATUS
FSR
TRISA
TRISB
PCLATH
INTCON
PIE1
PCON
ADCON1
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
20h
A0h
General
Purpose
Register
General
Purpose
Register
7Fh
FFh
Bank 0
Bank 1
File
Address
BFh
C0h
File
Address
Unimplemented data memory locations, read
as '0'.
Note 1:
Not a physical register.