- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄299771 > PIC16C662T-20I/L 8-BIT, OTPROM, 20 MHz, RISC MICROCONTROLLER, PQCC44 PDF資料下載
參數(shù)資料
| 型號： | PIC16C662T-20I/L |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 20 MHz, RISC MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 57/136頁 |
| 文件大?。?/td> | 634K |
| 代理商： | PIC16C662T-20I/L |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁當前第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁
1996 Microchip Technology Inc.
Preliminary
DS30559A-page 27
PIC16C64X & PIC16C66X
4.3
PCL and PCLATH
The program counter (PC) is 13-bits wide. The low byte
comes from the PCL register, which is readable and
writable. The high byte (PC<12:8>) is not directly read-
able or writable and comes from PCLATH. On any
reset, the PC is cleared. Figure 4-11 shows the two
situations for the loading of the PC. The upper example
in the gure shows how the PC is loaded on a write to
PCL (PCLATH<4:0>
→ PCH). The lower example in
the gure shows how the PC is loaded during a CALL
or GOTO instruction (PCLATH<4:3>
→ PCH).
FIGURE 4-11: LOADING OF PC IN
DIFFERENT SITUATIONS
4.3.1
COMPUTED GOTO
A computed GOTO is accomplished by adding an
offset to the program counter (ADDWF
PCL
). When
doing a table read using a computed GOTO method,
care should be exercised if the table location crosses a
PCL memory boundary (each 256 byte block). Refer to
the application note
“Implementing a Table Read”
(AN556).
PC
12
8
7
0
5
PCLATH<4:0>
PCLATH
Instruction with
ALU result
GOTO, CALL
Opcode <10:0>
8
PC
12
11 10
0
11
PCLATH<4:3>
PCH
PCL
87
2
PCLATH
PCH
PCL
PCL as
Destination
4.3.2
STACK
PIC16C64X & PIC16C66X devices have an 8 level
deep x 13-bit wide hardware stack (Figure 4-2). The
stack space is not part of either program or data space
and the stack pointer is not readable or writable. The
PC is PUSHed onto the stack when a CALL instruction
is executed or an interrupt causes a branch. The stack
is POPed in the event of a RETURN, RETLW or a RETFIE
instruction execution. PCLATH is not affected by a
PUSH or POP operation.
The stack operates as a circular buffer. This means that
after the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the rst
push. The tenth push overwrites the second push (and
so on).
4.4
Program Memory Paging
PIC16C642 and PIC16C662 devices have 4K of pro-
gram memory, but the CALL and GOTO instructions only
have an 11-bit address range. This 11-bit address
range allows a branch within a 2K program memory
page size. To allow CALL and GOTO instructions to
address the entire 4K program memory address range,
there must be another bit to specify the program mem-
ory page. This paging bit comes from the PCLATH<3>
bit (Figure 4-11). When doing a CALL or GOTO instruc-
tion, the user must ensure that this page select bit
(PCLATH<3>) is programmed so that the desired pro-
gram memory page is addressed. If a return from a
CALL
instruction (or interrupt) is executed, the entire
13-bit PC is pushed onto the stack. Therefore, manipu-
lation of the PCLATH<3> bit is not required for the
return instructions (which POPs the address from the
stack).
Note 1: There are no status bits to indicate stack
overow or stack underow conditions.
Note 2: There are no instructions mnemonics
called PUSH or POP. These are actions
that occur from the execution of the CALL,
RETURN,
RETLW,
and RETFIE instruc-
tions, or the vectoring to an interrupt
address.
Note:
The PIC16C64X & PIC16C66X ignore the
PCLATH<4> bit, which is used for program
memory pages 2 and 3 (1000h - 1FFFh).
The use of PCLATH<4> as a general pur-
pose read/write bit is not recommended
since this may affect upward compatibility
with future products.
相關PDF資料 |
PDF描述 |
|---|---|
| PIC16C662T-04E/TQ | 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PQFP44 |
| PIC16LC715T-04/SS | 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO20 |
| PIC16LC77-20I/TQ | 8-BIT, OTPROM, 20 MHz, RISC MICROCONTROLLER, PQFP44 |
| PIC16LF1828-E/ML | 8-BIT, FLASH, 32 MHz, RISC MICROCONTROLLER, PQCC20 |
| PIC16LF818T-I/SS | 8-BIT, FLASH, 10 MHz, RISC MICROCONTROLLER, PDSO20 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PIC16C66T-04/SO | 功能描述:8位微控制器 -MCU 14KB 368 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| PIC16C66T-04E/SO | 功能描述:8位微控制器 -MCU 14KB 368 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| PIC16C66T-04I/SO | 功能描述:8位微控制器 -MCU 14KB 368 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| PIC16C66T-10/SO | 功能描述:8位微控制器 -MCU 14KB 368 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| PIC16C66T-10E/SO | 功能描述:8位微控制器 -MCU 14KB 368 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復。