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PIC16C64X & PIC16C66X
DS30559A-page 130
Preliminary
1996 Microchip Technology Inc.
Figure 6-4:
Timer0 Interrupt Timing.................................. 42
Figure 6-5:
Timer0 Timing With External Clock................ 43
Figure 6-6:
Block Diagram of the Timer0/WDT Prescaler 44
Figure 7-1:
CMCON Register (Address 1Fh) ................... 47
Figure 7-2:
Comparator I/O Operating Modes.................. 48
Figure 7-3:
Single Comparator ......................................... 49
Figure 7-4:
Comparator Output Block Diagram ................ 50
Figure 7-5:
Analog Input Model ........................................ 51
Figure 8-1:
VRCON Register(Address 9Fh) ..................... 53
Figure 8-2:
Voltage Reference Block Diagram ................. 53
Figure 8-3:
Voltage Reference Output Buffer Example .... 54
Figure 9-1:
Configuration Word ........................................ 56
Figure 9-2:
Crystal Operation
(or Ceramic Resonator)
(HS, XT or LP Osc Configuration).................. 57
Figure 9-3:
External Clock Input Operation
(HS, XT or LP Osc Configuration).................. 57
Figure 9-4:
External Parallel Resonant Crystal Oscillator
Circuit ............................................................. 58
Figure 9-5:
External Series Resonant Crystal Oscillator
Circuit ............................................................. 58
Figure 9-6:
RC Oscillator Mode ........................................ 58
Figure 9-7:
Simplified Block Diagram of On-chip Reset
Circuit ............................................................. 59
Figure 9-8:
Brown-out Situations ...................................... 60
Figure 9-9:
Time-out Sequence on Power-up (MCLR not
tied to VDD): Case 1 ....................................... 64
Figure 9-10: Time-out Sequence on Power-up (MCLR not
tied to VDD): Case 2 ....................................... 64
Figure 9-11: Time-out Sequence on Power-up (MCLR tied to
VDD) ............................................................... 64
Figure 9-12: External Power-on Reset Circuit (For Slow VDD
Power-up) ...................................................... 65
Figure 9-13: External Brown-out Protection Circuit 1 ......... 65
Figure 9-14: External Brown-out Protection Circuit 2 ......... 65
Figure 9-15: Interrupt Logic ................................................ 66
Figure 9-16: RB0/INT Pin Interrupt Timing ......................... 67
Figure 9-17: Watchdog Timer Block Diagram .................... 69
Figure 9-18: Summary of Watchdog Timer Registers ........ 69
Figure 9-19: Wake-up from Sleep Through Interrupt ......... 70
Figure 9-20: Typical In-Circuit Serial Programming
Connection ..................................................... 71
Figure 10-1: General Format for Instructions ..................... 73
Figure 12-1: Load Conditions ............................................. 97
Figure 12-2: External Clock Timing .................................... 98
Figure 12-3: CLKOUT and I/O Timing ................................ 99
Figure 12-4: Reset, Watchdog Timer, Oscillator Start-Up Tim-
er, and Power-Up Timer Timing ................... 100
Figure 12-5: Brown-out Reset Timing .............................. 100
Figure 12-6: Timer0 Clock Timing .................................... 101
Figure 12-7: Parallel Slave Port Timing (PIC16C661 and
PIC16C662) ................................................. 102
LIST OF TABLES
Table 1-1:
PIC16C64X & PIC16C66X Device Features ... 6
Table 3-1:
PIC16C641/642 Pinout Description ............... 12
Table 3-2:
PIC16C661/662 Pinout Description ............... 13
Table 4-1:
Special Function Registers ............................ 20
Table 5-1:
PORTA Functions .......................................... 31
Table 5-2:
Summary of Registers Associated With
PORTA........................................................... 31
Table 5-3:
PORTB Functions .......................................... 33
Table 5-4:
Summary of Registers Associated with
PORTB........................................................... 33
Table 5-5:
PORTC Functions .......................................... 34
Table 5-6:
Summary of Registers Associated with
PORTC .......................................................... 34
Table 5-7:
PORTD Functions.......................................... 35
Table 5-8:
Summary of Registers Associated with
PORTD .......................................................... 35
Table 5-9:
PORTE Functions.......................................... 37
Table 5-10: Summary of Registers Associated with
PORTE .......................................................... 37
Table 5-11: Registers Associated with Parallel Slave Port39
Table 6-1:
Registers Associated with Timer0 ................. 45
Table 7-1:
Registers Associated with
Comparator Module ....................................... 52
Table 8-1:
Registers Associated with Voltage Reference54
Table 9-1:
Capacitor Selection for Ceramic Resonators
(Preliminary) .................................................. 57
Table 9-2:
Capacitor Selection for Crystal Oscillator
(Preliminary) .................................................. 57
Table 9-3:
Time-out in Various Situations....................... 61
Table 9-4:
Status Bits and Their Significance ................. 62
Table 9-5:
Initialization Condition for Special Registers.. 62
Table 9-6:
Initialization Condition for Registers .............. 63
Table 10-1: Opcode Field Descriptions............................. 73
Table 10-2: Instruction Set................................................ 75
Table 11-1: Development Tools From Microchip .............. 90
Table 12-1: Cross Reference of Device Specs for Oscillator
Configurations and Frequencies of Operation
(Commercial Devices) ................................... 91
Table 12-2: Comparator Specifications............................. 96
Table 12-3: Voltage Reference Specifications.................. 96
Table 12-4: External Clock Timing Requirements ............ 98
Table 12-5: CLKOUT and I/O Timing Requirements ........ 99
Table 12-6: Reset, Watchdog Timer, Oscillator Start-up Tim-
er, Power-up Timer, and Brown-out Reset Re-
quirements ................................................... 100
Table 12-7: Timer0 Clock Requirements ........................ 101
Table 12-8: Parallel Slave Port Requirements (PIC16C661
and PIC16C662) .......................................... 102
Table E-1:
Pin Compatible Devices............................... 125