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參數(shù)資料
| 型號： | PI2EQX6864-AZFE |
| 廠商： | Pericom |
| 文件頁數(shù)： | 2/18頁 |
| 文件大小： | 0K |
| 描述： | IC REDRIVER 56TQFN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | ReDriver™ |
| 類型： | 轉(zhuǎn)接驅(qū)動器 |
| 驅(qū)動器/接收器數(shù)： | 2/2 |
| 規(guī)程： | SAS2，SATA，XAUI |
| 電源電壓： | 1.2V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 56-TQFN-EP（5x11） |
| 包裝： | 管件 |
10
www.pericom.com
PS9103
07/21/10
All trademarks are property of their respective owners.
PI2EQX6864-A
6.5Gbps 4-Lane SAS2/SATA/XAUI 2.0 ReDriver
Transferring Data
Every byte put on the SDA line must be 8-bits long. Each byte has to be followed by an acknowledge bit. Data is transferred with the
most significant bit (MSB) first (see the I2C Data Transfer diagram). The PI2EQX6864-A will never hold the clock line SCL LOW to
force the master into a wait state.
Note: Byte-write and byte-read transfers have a fixed offset of 0x00, because of the very small number of configuration bytes. An
offset byte presented by a host to the PI2EQX6864-A is not used.
Addressing
Up to eight PI2EQX6864-A devices can be connected to a single I2C bus. The PI2EQX6864-A supports 7-bit addressing, with the
LSB indicating either a read or write operation. The address for a specific device is determined by the A0, A1 and A4 input pins.
Address Assignment
A6
A5
A4
A3
A2
A1
A0
R/W
1
Program
0
Programmable
1=R, 0=W
Acknowledge
Data transfer with acknowledge is required from the master. When the master releases the SDA line (HIGH) during the acknowl-
edge clock pulse, the PI2EQX6864-A will pull down the SDA line during the acknowledge clock pulse so that it remains stable LOW
during the HIGH period of this clock pulse as indicated in the I2C Data Transfer diagram. The PI2EQX6864-A will generate an
acknowledge after each byte has been received.
Data Transfer
A data transfer cycle begins with the master issuing a start bit. After recognizing a start bit, the PI2EQX6864-A will watch the next
byte of information for a match with its address setting. When a match is found it will respond with a read or write of data on the
following clocks. Each byte must be followed by an acknowledge bit, except for the last byte of a read cycle which ends with a stop
bit. For a write cycle, the first data byte following the address byte is a dummy or fill byte that is not used by the PI2EQX6864-A.
This byte is provided to provided compatibility with systems implementing 10-bit addressing. Data is transferred with the most
significant bit (MSB) first.
SDA
SCL
SDA
SCL
S
START condition
P
STOP condition
I2C START and STOP conditions.
Start & Stop Conditions
A HIGH to LOW transition on the SDA line while SCL is HIGH indicates a START condition. A LOW to HIGH transition on the
SDA line while SCL is HIGH defines a STOP condition, as shown in the figure below.
I2C Data Transfer
2010-0197
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| PI2EQX6874ZFE | 功能描述:緩沖器和線路驅(qū)動器 6.5Gbps 4ln SAS/SATA XAUI Redriver RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| PI2EQX6874ZFEX | 功能描述:緩沖器和線路驅(qū)動器 6.5Gbps 4 lane SAS/ SATA/XAUI Redriver RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| PI2EQX8804ANJE | 制造商:Pericom Semiconductor Corporation 功能描述:PCIE 3.0, 4 LANE (8 CHANNEL) REDRIVER - Bulk |
| PI2EQX8864AZLE | 功能描述:緩沖器和線路驅(qū)動器 PCIe 3.0 4 Lane 8 Chan ReDriver RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| PI2EQX8864AZLEX | 功能描述:緩沖器和線路驅(qū)動器 PCIe 3.0 4 Lane 8 Chann ReDriver RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
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