參數(shù)資料
型號(hào): PI2EQX6864-AZFE
廠商: Pericom
文件頁數(shù): 12/18頁
文件大小: 0K
描述: IC REDRIVER 56TQFN
標(biāo)準(zhǔn)包裝: 1
系列: ReDriver™
類型: 轉(zhuǎn)接驅(qū)動(dòng)器
驅(qū)動(dòng)器/接收器數(shù): 2/2
規(guī)程: SAS2,SATA,XAUI
電源電壓: 1.2V
安裝類型: 表面貼裝
封裝/外殼: 56-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 56-TQFN-EP(5x11)
包裝: 管件
3
www.pericom.com
PS9103
07/21/10
All trademarks are property of their respective owners.
PI2EQX6864-A
6.5Gbps 4-Lane SAS2/SATA/XAUI 2.0 ReDriver
DESCRIPTION of OPERATION
Configuration
Device configuration can be performed via I2C control. When MODE is set high, changes to the internal registers are disabled to
insure a known operating state. When the MODE pin is low, programming of the control registers via I2C is allowed. Note that the
MODE pin is not latched, and is always active to enable or disable I2C access.
Equalizer Configuration
The PI2EQX6864-A input equalizer compensates for signal attenuation and Inter-Symbol Interference (ISI) resulting from long
signal traces or cables, vias, signal crosstalk and other factors, by boosting the gain of high-frequency signal components. Because
either too little, or too much, signal compensation may be non-optimal eight levels are provided to adjust for any application.
Equalizer configuration takes a default state when the device first powers up. If the MODE pin is low, reprogramming of the equal-
ization control registers via I2C is allowed.
Each group of four channels, A and B, has separate equalization control, and all four channels within the group are assigned the
same configuration state. The Equalizer Selection table below describes operation of the equalizer. Refer to the section on I2C
programming for information on software programming.
Equalizer Selection
SEL2_[A:B]
SEL1_[A:B]
SEL0_[A:B]
@1.5GHz
@3.0GHz
0
0.8dB
1.5dB
0
1
1.0dB
1.9dB
0
1
0
1.5dB
3.2dB
0
1
2.5dB
5.2dB
1
0
3.5dB
6.9dB
1
0
1
4.4dB
8.3dB
1
0
5.9dB
10.4dB
1
8.7dB
13.8dB
Pin #
Pin Name
Type
Description
50
SIG_A
0
Signal detect output for channel A. SIG_A indicates a valid input signal which is
> Vth at the differential inputs. With 100K-Ohm pull up.
51
PD#
I
Input with internal 100K-Ohm pull-up resistor, PD# = High or open is normal
operation, PD# = Low disable the IC, and set IC to power down mode, both
input and output go Hi-Z.
52
SDA
I/O
I2C SDA data input. Up to 3.3V input tolerance
53
SCL
I/O
I2C SCL clock input. Up to 3.3V input tolerance.
Power Pins
55, 56, Center Pad
GND
PWR
Supply Ground
1, 6, 11, 16, 21, 29,
34, 39, 44, 49
VDD
PWR
1.2V Supply Voltage ± 0.05V
2010-0197
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