5.0Gbps 4-Lane PCIe 2.0 ReDdriver
參數(shù)資料
型號: PI2EQX5864CZFE
廠商: Pericom
文件頁數(shù): 2/20頁
文件大?。?/td> 0K
描述: IC PCI-E REDRIVER 56TQFN
標準包裝: 66
系列: ReDriver™
類型: 轉(zhuǎn)接驅(qū)動器
Tx/Rx類型: CML
電容 - 輸入: 50pF
電源電壓: 1.15 V ~ 1.25 V
電流 - 電源: 800mA
安裝類型: 表面貼裝
封裝/外殼: 56-WFQFN 裸露焊盤
供應商設備封裝: 56-TQFN-EP(5x11)
包裝: 管件
10
PS8934D
07/08/09
PI2EQX5864C
5.0Gbps 4-Lane PCIe 2.0 ReDdriver
with Equalization, Emphasis and I2C Control
BYTE 3 - Channel Input Disable (INDIS)
INDIS_xy=0=enable input, INDIS_xy=1=disable input
Bit
76543210
Name
INDIS_A0
INDIS_B0
INDIS_A1
INDIS_B1
INDIS_A2
INDIS_B2
INDIS_A3
INDIS_B3
Type
R/W
Power-on
State
00000000
Note: R=Read only, W=Write only, R/W=Read and Write, X=Undened, rsvd=reserved for future use
The Channel Input Disable register, provides control over the input buffer of each channel independently. When and INDIS_xy bit is
logic 1, then the input buffer is switched off and the input termination is high impedance. This feature can be used for PCB testing,
and when only one input is used during Loopback as a demux function. When INDIS_xy is at a logic 0 state then the input buffer is
enabled (normal operating mode).
BYTE 4 - Channel Output Disable (OUTDIS)
ODIS_xy=0=enable output, ODIS_xy=1=disable output
Bit
76543210
Name
ODIS_A0
ODIS_B0
ODIS_A1
ODIS_B1
ODIS_A2
ODIS_B2
ODIS_A3
ODIS_B3
Type
R/W
Power-on
State
00000000
Note: R=Read only, W=Write only, R/W=Read and Write, X=Undened, rsvd=reserved for future use
The Channel Output Disable register, allows control over the output buffer of each channel independently. When and OUTDIS_xy
bit is logic 1, then the output buffer is switched off and the termination is high impedance. This feature can be used for PCB testing,
and when only one output is used during Loopback as a mux function. When INDIS_xy is at a logic 0 state then the input buffer is
enabled (normal operating mode).
Byte 2 - Loopback and Emphasis Control Register (LBEC)
LB_xyxy#=0=loopback mode, LB_xyxy#=1=normal mode, DE_x=0=pre-emphasis, DE_x=1=de-emphasis
Bit
76543210
Name
LB_A0B0#
LB_A1B1#
LB_A2B2#
LB_A3B3#
DE_A
DE_B
rsvd
Type
R/W
R
Power-on
State
LB#
1
X
Note: R=Read only, W=Write only, R/W=Read and Write, X=Undened, rsvd=reserved for future use
Individual control for each lane is provided for the loopback function via this register.
09-0002
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