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CHAPTER 23 LOW-VOLTAGE DETECTOR
User’s Manual U16228EJ2V0UD
414
(1) Low-voltage detection register (LVIM)
This register sets low-voltage detection and the operation mode.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears LVIM to 00H.
Figure 23-2. Format of Low-Voltage Detection Register (LVIM)
Address: FFBEH After reset: 00H R/W
Note 1
<0>
LVIF
<1>
LVIMD
2
0
3
0
<4>
LVIE
5
0
6
0
<7>
LVION
Symbol
LVIM
LVION
Notes 2, 3
Enables low-voltage detection operation
0
Disables operation
1
Enables operation
LVIE
Notes 2, 4, 5
Specifies reference voltage generator
0
Disables operation
1
Enables operation
LVIMD
Note 2
Low-voltage detection operation mode selection
0
Generates interrupt signal when supply voltage (V
DD
) < detection voltage (V
LVI
)
1
Generates internal reset signal when supply voltage (V
DD
) < detection voltage (V
LVI
)
LVIF
Note 6
Low-voltage detection flag
0
Supply voltage (V
DD
) > detection voltage (V
LVI
), or when operation is disabled
1
Supply voltage (V
DD
) < detection voltage (V
LVI
)
Notes 1.
Bit 0 is read-only.
2.
LVION, LVIE, and LVIMD are cleared to 0 at a reset other than an LVI reset. These are not
cleared to 0 at an LVI reset.
3.
When LVION is set to 1, operation of the comparator in the LVI circuit is started. Use
software to instigate a wait of at least 0.2 ms from when LVION is set to 1 until the voltage is
confirmed at LVIF.
4.
If “POC cannot be used” is selected by a mask option, wait for 2 ms or more by software from
when LVIE is set to 1 until LVION is set to 1.
5.
If “POC used” is selected by a mask option, setting of LVIE is invalid because the reference
voltage generator in the LVI circuit always operates.
6.
The value of LVIF is output as the interrupt request signal INTLVI when LVION = 1 and
LVIMD = 0.
Caution To stop LVI, follow either of the procedures below.
When using 8-bit manipulation instruction: Write 00H to LVIM.
When using 1-bit memory manipulation instruction: Clear LVION to 0 first and then
clear LVIE to 0.