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CHAPTER 19 STANDBY FUNCTION
User’s Manual U16228EJ2V0UD
384
19.2 Standby Function Operation
19.2.1 HALT mode
(1) HALT mode
The HALT mode is set by executing the HALT instruction. HALT mode can be set regardless of whether the CPU
clock before the setting was the X1 input clock, Ring-OSC clock, or subsystem clock.
The operating statuses in the HALT mode are shown below.
Table 19-2. Operating Statuses in HALT Mode (1/2)
When HALT Instruction Is Executed While CPU Is
Operating on X1 Input Clock
When HALT Instruction Is Executed While CPU Is
Operating on Ring-OSC Clock
When Ring-OSC
Oscillation Continues
When Ring-OSC
Oscillation Stopped
Note 1
When X1 Input Clock
Oscillation Continues
When X1 Input Clock
Oscillation Stopped
HALT Mode Setting
Item
When
Subsystem
Clock Used
When
Subsystem
Clock Not
Used
When
Subsystem
Clock Used
When
Subsystem
Clock Not
Used
When
Subsystem
Clock Used
When
Subsystem
Clock Not
Used
When
Subsystem
Clock Used
When
Subsystem
Clock Not
Used
System clock
CPU
Port (latch)
16-bit timer/event counter 00
16-bit timer/event counter 01
8-bit timer/event counter 50
Clock supply to the CPU is stopped.
Operation stopped
Status before HALT mode was set is retained
Operable
Operable
Operable
Operation not guaranteed
Operation not guaranteed
Operation not guaranteed when count clock other than
TI50 is selected
Operation not guaranteed when count clock other than
TI51 is selected
Operation not guaranteed when count clock other than
TM50 output is selected during 8-bit timer/event counter
50 operation
Operation not guaranteed when count clock other than
f
R
/2
Operable
Operation not
guaranteed
Operable
Note 2
8-bit timer/event counter 51
Operable
8-bit timer H0
Operable
8-bit timer H1
Operable
7
is selected
Watch timer
Operable
Operable
Note 3
Operable
Operable
Note 3
Note 4
Operable
Note 4
Operation not
guaranteed
Ring-OSC cannot
be stopped
Ring-OSC can be
stopped
Note 5
Operable
Watchdog
timer
Note 5
Operation stopped
A/D converter
Serial
interface
Operable
Operable
Operable
Operable
Operation not guaranteed
Operation not guaranteed when serial clock other than
TM50 output is selected during TM50 operation
UART0
UART6
CSI10
Operation not guaranteed when serial clock other than
external SCK10 is selected
Operation not guaranteed when serial clock other than
external SCK11 is selected
Operable
Operation not guaranteed
CSI11
Note 2
Operable
Clock monitor
Multiplier/divider
Power-on-clear function
Low-voltage detection function
External interrupt
Notes 1.
When “Stopped by software” is selected for Ring-OSC by a mask option and Ring-OSC is stopped by
software (for mask options, see
CHAPTER 25 MASK OPTIONS
).
2.
μ
PD780133, 780134, 78F0134, 780136, 780138, and 78F0138 only.
3.
Operable when the X1 input clock is selected.
4.
Operation not guaranteed when other than subsystem clock is selected.
5.
“Ring-OSC cannot be stopped” or “Ring-OSC can be stopped by software” can be selected by a mask
option.
6.
When “POC used” is selected by a mask option.
Operable
Operable
Operable
Operable
Operable
Operation stopped
Operation stopped
Note 6