參數(shù)資料
型號： PCM9211PTR
廠商： TEXAS INSTRUMENTS INC
元件分類： 網(wǎng)絡接口
英文描述： DATACOM, TOKEN RING TRANSCEIVER, PQFP48
封裝： GREEN, PLASTIC, LQFP-48
文件頁數(shù)： 72/121頁
文件大小： 1219K
代理商： PCM9211PTR
R/W
ADR 6 ADR 5 ADR 4 ADR 3 ADR 2 ADR 1 ADR 0
D7
D6
D5
D4
D3
D2
D1
D0
Register
Address
RegisterData
MSB
LSB
SBAS495 – JUNE 2010
www.ti.com
Serial Control Mode
The PCM9211 supports two types of control interface, which are set using the MODE pin (pin 27), as defined in
Table 33. Mode Control Interface Types
MODE
MODE CONTROL INTERFACE
Tied to DGND
Two-wire (I2C) serial control
Tied to VDD
Four-wire (SPI) serial control
The input state of the MODE pin is only sampled during a power-on reset or external reset event. Therefore, any
change after device power on or external reset is ignored.
Table 34 shows the pin assignments based on the control interface selected.
Table 34. Pin Assignments for SPI and I2C Control Interfaces
DEFINITION
PIN
SPI MODE
I2C MODE
23
MDO
ADR0
24
MDI
SDA
25
MC
SCL
26
MS
ADR1
Four-Wire (SPI) Serial Control
The PCM9211 includes an SPI-compatible serial port, which operates asynchronously to the audio serial
interface. The control interface consists of these data sources: MDI/SDA, MS/ADR1, MC/SCL, and MDO/ADR0.
MDI is the serial data input to program the mode control registers. In other applications, this source may be
known as MOSI.
MDO is the serial data output to read back register settings and some flags. In other applications, this source
may be known as MISO.
MC is the serial bit clock to shift the data into the control port. In other applications, this clock may be known
as SCK.
MS is the select input to enable the mode control port. In other applications, this control may be known as an
active-low Chip Select (CS).
Control Data Word Format
All single write/read operations via the serial control port use 16-bit data words. Figure 36 shows the control data
word format. The first bit is for read/write control, where '0' indicates a write operation and '1' shows a read
operation. The next seven bits, labeled ADR[6:0], set the register address for the write/read operation. The least
significant eight bits, D[7:0] on MDI or MDO, contain the data to be written to (or read from) the register specified
by ADR[6:0].
Figure 36. Control Data Word Format for MDI
54
Copyright 2010, Texas Instruments Incorporated
Product Folder Link(s): PCM9211
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