參數(shù)資料
型號： PCM3794RHBT
廠商： TEXAS INSTRUMENTS INC
元件分類： 通信及網(wǎng)絡(luò)
英文描述： SPECIALTY TELECOM CIRCUIT, PQCC32
封裝： 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件頁數(shù)： 19/67頁
文件大小： 1417K
代理商： PCM3794RHBT
www.ti.com
Three-Wire Interface (SPI) Timing Requirements
tw(MCH)
50%ofVIO
MS
t(MLS)
LSB
50%ofVIO
tw(MCL)
tw(MHH)
t(MLH)
t(MCY)
t(MDH)
t(MDS)
MC
MD
T0013-08
TWO-WIRE INTERFACE [I2C, MODE (PIN 28) = HIGH]
SLAVE ADDRESS
SLES193C – AUGUST 2006 – REVISED FEBRUARY 2007
Figure 31 shows a detailed timing diagram for the serial control interface. These timing parameters are critical
for proper control port operation.
PARAMETERS
MIN
TYP
MAX
UNIT
t(MCY)
MC pulse cycle time
500(1)
ns
tw(MCL)
MC low level time
50
ns
tw(MCH)
MC high level time
50
ns
tw(MHH)
MS high level time
(1)
ns
t(MLS)
MS falling edge to MC rising edge
20
ns
t(MLH)
MS hold time
20
ns
t(MDH)
MD hold time
15
ns
t(MDS)
MD setup time
20
ns
(1)
3/(128 fS) s (min), where fS is sampling rate.
Figure 31. SPI Interface Timing
The PCM3793/94 supports the I2C serial bus and the data transmission protocol for the I2C standard as a slave
device. This protocol is explained in I2C specification 2.0.
In I2C mode, the control terminals are changed as follows.
TERMINAL NAME
PROPERTY
DESCRIPTION
MS/ADR
Input
I2C address
MD/SDA
Input/output
I2C data
MC/SCL
Input
I2C clock
MSB
LSB
1
0
1
ADR
R/W
The PCM3793/94 has its own 7-bit slave address. The first six bits (MSBs) of the slave address are factory
preset to 100011. The last bit of the address byte is the device select bit, which can be user-defined by the ADR
terminal. A maximum of two PCM3793/94s can be connected on the same bus at one time. Each PCM3793/94
responds when it receives its own slave address.
26
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