參數(shù)資料
型號(hào)： PCM3168ATPAPRQ1G4
廠商： Texas Instruments
文件頁(yè)數(shù)： 16/68頁(yè)
文件大小： 0K
描述： IC 24-BIT AUDIO CODEC 64-HTQFP
標(biāo)準(zhǔn)包裝： 1,000
類型： 音頻編解碼器
數(shù)據(jù)接口： 串行
分辨率（位）： 24 b
ADC / DAC 數(shù)量： 6 / 8
三角積分調(diào)變： 是
S/N 比，標(biāo)準(zhǔn) ADC / DAC (db)： 107 / 112（差分），104 / 112（單端）
動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： 107 / 112（差分），104 / 112（單端）
電壓 - 電源，模擬： 4.5 V ~ 5.5 V
電壓 - 電源，數(shù)字： 3 V ~ 3.6 V
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 64-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 64-HTQFP（10x10）
包裝： 帶卷 (TR)
VDD
SynchronousClocks
ZERO
Power-Down
NormalOperation
SynchronousClocks
0V
SCKI,
BCKAD/DA,
LRCKAD/DA
RST
InternalReset
VOUT1
to
VOUT8
±
DOUT1/2/3
t
ADCDLY2
t
DACDLY1
t
DACDLY2
0.5
VCC
(VDD=3.3V,typ)
3846
SCKI
Fade-In
100ns(min)
t
ADCDLY1
AUDIO SERIAL PORT OPERATION
AUDIO DATA INTERFACE FORMATS AND TIMING
www.ti.com ......................................................................................................................................................................................... SBAS452 – SEPTEMBER 2008
Figure 34. External Reset Timing Requirements
The PCM3168A and PCM3168A-Q1 audio serial ports consist of 11 signals: BCKDA, BCKAD, LRCKDA,
LRCKAD, DIN1, DIN2, DIN3, DIN4, DOUT1, DOUT2, and DOUT3. The PCM3168A and PCM3168A-Q1 also
support audio interface mode, slave mode, and master mode. The BCKAD/DA is a bit clock input at the slave
mode and an output at the master mode. The LRCKAD/DA is a left/right word clock or frame synchronization
clock input at slave mode and output at master mode. The DIN1/2/3/4 are the audio data inputs for the DAC. The
DOUT1/2/3 are the audio data outputs from the ADC. BCKAD, LRCKAD and DOUT1/2/3 are used for the ADC,
and BCKDA, LRCKDA and DIN1/2/3/4 are used for the DAC.
The PCM3168A and PCM3168A-Q1 support eight audio data interface formats for the ADC and DAC separately
in both master and slave modes: 24-bit I2S, 24-bit left-justified, 24-bit right-justified, 16-bit right-justified, 24-bit
left-justified mode DSP, 24-bit I2S mode DSP, 24-bit left-justified mode TDM, and 24-bit I2S mode TDM format.
The PCM3168A and PCM3168A-Q1 also support two audio data interface formats for the DAC and slave mode:
24-bit left-justified mode high-speed TDM and 24-bit I2S mode high-speed TDM format. In the case of I2S,
left-justified, and right-justified data formats, 64 BCKs, 48 BCKs, and 32 BCKs per LRCK period are supported,
but 48 BCKs are limited in slave mode and 32 BCKs are limited in slave mode 16-bit right-justified only. In the
case of TDM data format in single rate, BCKAD/DA, LRCKAD/DA, DOUT1, and DIN1 are used. In the case of
TDM data format in dual rate, BCKAD/DA, LRCKAD/DA, DOUT1/2, and DIN1/2 are used. In the case of
high-speed TDM format in dual rate, BCKDA, LRCKDA, and DIN1 are used. In the case of high-speed TDM
format in quad rate, BCKDA, LRCKDA, and DIN1/2 are used. TDM format and high-speed TDM format are
supported only at SCKI = 512 fS, 256 fS, 128 fS, and fBCK ≤ fSCKI. The audio data formats are selected by
MC/SCL/FMT in hardware control mode and registers 65 and 81 in software control mode. All data must be in
binary twos complement, MSB first.
Figure 35 through Figure 41 show 10 audio interface data formats. Table 8 summarizes the applicable formats
and describes the relationships among them and the respective restrictions with mode control.
Copyright 2008, Texas Instruments Incorporated
23
Product Folder Link(s): PCM3168A PCM3168A-Q1
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