參數(shù)資料
型號: PCF8578T
廠商: NXP Semiconductors N.V.
元件分類: LCD驅動器
英文描述: LCD row-column driver for dot matrix graphic displays
封裝: PCF8578HT/1<SOT357-1 (TQFP64)|<<http://www.nxp.com/packages/SOT357-1.html<1<Always Pb-free,;PCF8578T/1<SOT190-1 (VSO56)|<<http://www.nxp.com/packages/SOT190-1.html<1&l
文件頁數(shù): 2/46頁
文件大?。?/td> 274K
代理商: PCF8578T
PCF8578_6
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 06 — 5 May 2009
10 of 46
NXP Semiconductors
PCF8578
LCD row/column driver for dot matrix graphic displays
Table 5 shows the relative values of the resistors required in the conguration of Figure 5
to produce the standard multiplex rates.
8.2 Power-on reset
At power-on the PCF8578 resets to a dened starting condition as follows:
1. Display blank
2. 1:32 multiplex rate, row mode
3. Start bank 0 selected
4. Data pointer is set to X, Y address 0, 0
5. Character mode
6. Subaddress counter is set to 0
7. I2C-bus interface is initialized
Remark: Do not transfer data on the I2C-bus for at least 1 ms after power-on to allow the
reset action to complete.
8.3 Multiplexed LCD bias generation
The bias levels required to produce maximum contrast depend on the multiplex rate and
the LCD threshold voltage (Vth). Vth is typically dened as the RMS voltage at which the
LCD exhibits 10 % contrast. Table 6 shows the optimum voltage bias levels and Table 7
the discrimination ratios (D) for the different multiplex rates as functions of Voper.
(1)
The RMS on-state voltage (Von(RMS)) for the LCD is calculated with the equation
(2)
and the RMS off-state voltage (Voff(RMS)) with the equation
(3)
Table 5.
Multiplex rates and resistor values for Figure 5
Resistors
Multiplex rate (1:n)
n = 8
n = 16, 24, 32
R1
R
R2
R
R3
n2
()R
3n
()R
n3
()R
V
oper
V
DD
V
LCD
=
V
on RMS
()
1
n
---
n1
nn
1
+
()
------------------------
+
V
oper
=
V
off RMS
()
2n
1
()
nn
1
+
()2
-------------------------------
V
oper
=
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