參數(shù)資料
型號(hào)： PCF2113DHF4
廠商： NXP Semiconductors N.V.
英文描述： LCD controllers/drivers
中文描述： LCD控制器/驅(qū)動(dòng)器
文件頁(yè)數(shù)： 28/72頁(yè)
文件大小： 332K
代理商： PCF2113DHF4
2001 Dec 19
28
Philips Semiconductors
Product specification
LCD controllers/drivers
PCF2113x
8.6.4
B
IT
H
When H = 0 the chip can be programmed via the standard
11 instruction codes used in the PCF2116 and other LCD
controllers.
When H = 1 the extended range of instructions will be
used. These are mainly for controlling the display
configuration and the icons.
8.7
Set CGRAM address
‘Set CGRAM address’ sets bits DB5 to 0 of the CGRAM
address A
CG
into the address counter (binary A5 to A0).
Data can then be written to or read from the CGRAM.
Attention:
the CGRAM address uses the same address
register as the DDRAM address and consists of 7 bits
(binary A6 to A0). With the ‘set CGRAM address’
command, only bits DB5 to DB0 are set. Bit DB6 can be
set using the ‘set DDRAM address’ command first, or by
using the auto-increment feature during CGRAM write. All
bits DB6 to DB0 can be read using the ‘read busy flag’ and
‘read address’ command.
When writing to the lower part of the CGRAM, ensure that
bit DB6oftheaddress isnotset(e.g.byanearlierDDRAM
write or read action).
8.8
Set DDRAM address
‘Set DDRAM address’ sets the DDRAM address A
DD
into
the address counter (binary A6 to A0). Data can then be
written to or read from the DDRAM.
8.9
Read busy flag and read address
‘Read busy flag and address counter’ read the Busy Flag
(BF) and Address Counter (AC). BF = 1 indicates that an
internal operation is in progress. The next instruction will
not be executed until BF = 0. It is recommended that the
BF status is checked before the next write operation is
executed.
At the same time, the value of the address counter
expressed in binary A6 to A0 is read out. The address
counter is used by both CGRAM and DDRAM, and its
value is determined by the previous instruction.
8.10
Write data to CGRAM or DDRAM
‘Write data’ writes binary 8-bit data DB7 to DB0 to the
CGRAM or the DDRAM.
Whether the CGRAM or DDRAM is to be written into is
determined by the previous ‘set CGRAM address’ or ‘set
DDRAM address’ command. After writing, the address
automatically increments or decrements by 1, in
accordance with the entry mode. Only bits DB4 to DB0 of
CGRAM data are valid, bits DB7 to DB5 are ‘don’t care’.
8.11
Read data from CGRAM or DDRAM
‘Read data’ reads binary 8-bit data DB7 to DB0 from the
CGRAM or DDRAM.
The most recent ‘set address’ command determines
whether the CGRAM or DDRAM is to be read.
The ‘read data’ instruction gates the content of the Data
Register (DR) to the bus while pin E is HIGH. After pin E
goes LOW again, internal operation increments (or
decrements) the AC and stores RAM data corresponding
to the new AC into the DR.
There are only three instructions that update the data
register:
‘Set CGRAM address’
‘Set DDRAM address’
‘Read data’ from CGRAM or DDRAM.
Other instructions (e.g. ‘write data’, ‘cursor/display shift’,
‘clear display’ and ‘return home’) do not modify the data
register content.
9
EXTENDED FUNCTION SET INSTRUCTIONS AND
FEATURES
9.1
New instructions
H = 1 sets the chip into alternate instruction set mode.
9.2
Icon control
The PCF2113x can drive up to 120 icons. See Fig.16 for
CGRAM to icon mapping.
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