參數(shù)資料
型號(hào): PCD3755FH
廠商: NXP SEMICONDUCTORS
元件分類(lèi): 微控制器/微處理器
英文描述: 8-bit microcontrollers with DTMF generator, 8 kbytes OTP and 128 bytes EEPROM
中文描述: 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP32
封裝: 7 X 7 X 1.40 MM, PLASTIC, LQFP-32
文件頁(yè)數(shù): 7/32頁(yè)
文件大?。?/td> 200K
代理商: PCD3755FH
1997 Apr 16
7
Philips Semiconductors
Product specification
8-bit microcontrollers with DTMF generator,
8 kbytes OTP and 128 bytes EEPROM
PCD3755A; PCD3755E;
PCD3755F
6
FREQUENCY GENERATOR
A versatile frequency generator section is provided (see
Fig.4). For normal operation, use a 3.58 MHz quartz
crystal or PXE resonator. The frequency generator
includes precision circuitry for dual tone multifrequency
(DTMF) signals, which is typically used for tone dialling
telephone sets.
Their frequencies are provided in purely sinusoidal form on
the TONE output or as square waves on the P1.7/MDY
output.
The TONE output can alternatively issue twelve modem
frequencies for data rates between 300 and 1200 bits/s.
In addition to DTMF and modem frequencies, two octaves
of musical scale in steps of semitones are available.
In case no tones are generated the TONE output is in
3-state mode.
6.1
Frequency generator derivative registers
6.1.1
H
IGH AND
L
OW
G
ROUP
F
REQUENCY REGISTERS
Table 3 gives the addresses, mnemonics and access types of the High Group Frequency (HGF) and Low Group
Frequency (LGF) registers.
Table 3
Hexadecimal addresses, mnemonics, access types and bit mnemonics of the frequency registers
6.1.2
M
ELODY
C
ONTROL
R
EGISTER
(MDYCON)
MDYCON is a R/W register.
Table 4
Melody Control Register (address 13H)
Table 5
Description of MDYCON bits
REGISTER
ADDRESS
REGISTER
MNEMONIC
ACCESS
TYPE
BIT MNEMONICS
7
6
5
4
3
2
1
0
11H
12H
HGF
LGF
W
W
H7
L7
H6
L6
H5
L5
H4
L4
H3
L3
H2
L2
H1
L1
H0
L0
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
EMO
BIT
MNEMONIC
EMO
DESCRIPTION
7 to 1
0
These bits are set to a logic 0.
Enable Melody Output. If bit EMO = 0, then P1.7/MDY is a standard port line.
If bit EMO = 1, then P1.7/MDY is the melody output. EMO = 1 does not inhibit the port
instructions for P1.7/MDY. Therefore the state of both port line and flip-flop may be read
in and the port flip-flop may be written by port instructions. However, the port flip-flop of
P1.7/MDY must remain set to avoid conflicts between melody and port outputs.
When the HGF contents are zero while EMO = 1, P1.7/MDY is in the logic HIGH state.
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