- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1959 > PCA9698DGG/S911,51 (NXP Semiconductors)IC I/O EXPANDER I2C 40B 56TSSOP PDF資料下載
參數(shù)資料
| 型號： | PCA9698DGG/S911,51 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 11/48頁 |
| 文件大小： | 0K |
| 描述： | IC I/O EXPANDER I2C 40B 56TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 接口： | I²C |
| 輸入/輸出數(shù)： | 40 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 1MHz |
| 電源電壓： | 2.3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-TFSOP（0.240"，6.10mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 56-TSSOP |
| 包裝： | 帶卷 (TR) |
| 包括： | POR |
| 其它名稱： | 935285491518 PCA9698DGG/S911-T PCA9698DGG/S911-T-ND |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁當(dāng)前第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁
19
7810C–AVR–10/12
Atmel ATmega328P [Preliminary]
7.4.1
EEPROM Read/Write Access
The EEPROM Access Registers are accessible in the I/O space.
The write access time for the EEPROM is given in Table 7-2. A self-timing function, however,
lets the user software detect when the next byte can be written. If the user code contains instruc-
tions that write the EEPROM, some precautions must be taken. In heavily filtered power
supplies, V
CC is likely to rise or fall slowly on power-up/down. This causes the device for some
period of time to run at a voltage lower than specified as minimum for the clock frequency used.
See “Preventing EEPROM Corruption” on page 19 for details on how to avoid problems in these
situations.
In order to prevent unintentional EEPROM writes, a specific write procedure must be followed.
Refer to the description of the EEPROM Control Register for details on this.
When the EEPROM is read, the CPU is halted for four clock cycles before the next instruction is
executed. When the EEPROM is written, the CPU is halted for two clock cycles before the next
instruction is executed.
7.4.2
Preventing EEPROM Corruption
During periods of low V
CC, the EEPROM data can be corrupted because the supply voltage is
too low for the CPU and the EEPROM to operate properly. These issues are the same as for
board level systems using EEPROM, and the same design solutions should be applied.
An EEPROM data corruption can be caused by two situations when the voltage is too low. First,
a regular write sequence to the EEPROM requires a minimum voltage to operate correctly. Sec-
ondly, the CPU itself can execute instructions incorrectly, if the supply voltage is too low.
EEPROM data corruption can easily be avoided by following this design recommendation:
Keep the AVR RESET active (low) during periods of insufficient power supply voltage. This can
be done by enabling the internal Brown-out Detector (BOD). If the detection level of the internal
BOD does not match the needed detection level, an external low V
CC reset Protection circuit can
be used. If a reset occurs while a write operation is in progress, the write operation will be com-
pleted provided that the power supply voltage is sufficient.
7.5
I/O Memory
The I/O space definition of the ATmega328P is shown in “Register Summary” on page 326.
All ATmega328P I/Os and peripherals are placed in the I/O space. All I/O locations may be
accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32
general purpose working registers and the I/O space. I/O Registers within the address range
0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the
value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the
instruction set section for more details. When using the I/O specific commands IN and OUT, the
I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using
LD and ST instructions, 0x20 must be added to these addresses. The ATmega328P is a com-
plex microcontroller with more peripheral units than can be supported within the 64 location
reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 -
0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PCF51AC256BCPUE | MCU 8BIT 256K FLASH 64-LQFP |
| PCF51JM64VLH | MCU 32BIT 64K FLASH 64-LQFP |
| PCF8574T/3,518 | IC I/O EXPANDER I2C 8B 16SOIC |
| PCF8575CTS/1,118 | IC I/O EXPANDER I2C 16B 24SSOP |
| PCF8575TS/1,112 | IC I/O EXPANDER I2C 16B 24SSOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCA9698DGGT | 制造商:NXP Semiconductors 功能描述:I2C GPIO Expander 5.5V 56-Pin TSSOP T/R |
| PCA9698DGG-T | 制造商:NXP Semiconductors 功能描述:I2C GPIO Expander 5.5V 56-Pin TSSOP T/R |
| PCA96PWS911,118 | 功能描述:接口-I/O擴(kuò)展器 8-BIT I2C FM QB RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9701D | 功能描述:寄存器 16BIT SPI 18V GPI INT -40 +125 RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| PCA9701D,112 | 功能描述:接口 - 專用 16BIT SPI 18V GPI RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。