參數(shù)資料
型號(hào)： PAC7116
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： Microcontroller Family Hardware Specifications
中文描述： 微控制器系列硬件規(guī)格
文件頁(yè)數(shù)： 14/56頁(yè)
文件大?。?/td> 471K
代理商： PAC7116
MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2
Preliminary
Electrical Characteristics
Freescale Semiconductor
14
3.7.5
Chip Power Up and Voltage Drops
The VREG sub-modules LVI (low voltage interrupt), POR (power on reset) and LVR (low voltage reset)
handle chip power-up or drops of the supply voltage. Refer to
Figure 2
.
Figure 2. VREG Chip Power-up and Voltage Monitoring
3.7.6
Output Loads
The on-chip voltage regulator is intended to supply the internal logic and oscillator circuits. No external
DC load is allowed. Capacitive loads are specified in
Table 18
. Capacitors with X7R dielectricum are
required.
Table 18. VREG Recommended Load Capacitances
Rating
Symbol
Min
Typ
Max
Unit
Load Capacitance per V
DD
2.5 pin
1
NOTES:
1. Refer to
Table 38
for the specific number of V
DD
2.5 pins on various packages. Each V
DD
2.5 pin should have the
recommended loading as described in Section 3.7.3, “Circuit Board Layout,
”
of the
MAC7100 Microcontroller Family
Reference Manual
(MAC7100RM).
C
LVDD
200
220
12000
nF
Load Capacitance on V
DD
PLL pin
C
LVDDfcPLL
90
220
5000
nF
LVI Disabled
due to LVR
V
LVID
V
LVIA
V
LVRD
V
LVRA
LVR
POR
LVI
V
PORD
Time
LVI Enabled
V
DD
A
V
DD
2.5
Voltage
Note: Not to scale.
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