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    參數(shù)資料
    型號(hào): PA28F400CV-T80
    廠商: Intel Corp.
    英文描述: 2-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY
    中文描述: 2兆位SmartVoltage啟動(dòng)塊閃存系列
    文件頁(yè)數(shù): 28/50頁(yè)
    文件大?。?/td> 559K
    代理商: PA28F400CV-T80
    28F400BX-T/B, 28F004BX-T/B
    290451–12
    Bus
    Command
    Comments
    Operation
    Write
    Erase
    Suspend
    Data
    e
    B0H
    Read
    Status Register Data.
    Toggle OE
    Y
    or CE
    Y
    to
    update Status Register
    Standby
    Check SR.7
    1
    e
    Ready
    Standby
    Check SR.6
    1
    e
    Suspended
    Write
    Read Array
    Data
    e
    FFH
    Read
    Read array data from block
    other than that being
    erased.
    Write
    Erase Resume
    Data
    e
    D0H
    Figure 15. Erase Suspend/Resume Flowchart
    4.5 Power Consumption
    4.5.1 ACTIVE POWER
    With CE
    Y
    at a logic-low level and RP
    Y
    at a logic-
    high level, the device is placed in the active mode.
    The device I
    CC
    current is a maximum 60 mA at
    10 MHz with TTL input signals.
    4.5.2 AUTOMATIC POWER SAVINGS
    Automatic Power Savings (APS) is a low pwer fea-
    ture during active mode of operation. The 4-Mbit
    family of products incorporate Power Reduction
    Control (PRC) circuitry which basically allows the de-
    vice to put itself into a low current state when it is
    not being accessed. After data is read from the
    memory array, PRC logic controls the device’s pow-
    er consumption by entering the APS mode where
    maximum I
    CC
    current is 3 mA and typical I
    CC
    current
    is 1 mA. The device stays in this static state with
    outputs valid until a new location is read.
    4.5.3 STANDBY POWER
    With CE
    Y
    at a logic-high level (V
    IH
    ), and the CUI in
    read mode, the memory is placed in standby mode
    where the maximum I
    CC
    standby current is 100
    m
    A
    with CMOS input signals. The standby operation dis-
    ables much of the device’s circuitry and substantially
    reduces device power consumption. The outputs
    (DQ
    [
    0:15
    ]
    or DQ
    [
    0:7
    ]
    ) are placed in a high-imped-
    ance state independent of the status of the OE
    Y
    signal. When the 4-Mbit boot block flash family is
    deselected during erase or program functions, the
    devices will continue to perform the erase or pro-
    gram function and consume program or erase active
    power until program or erase is completed.
    28
    相關(guān)PDF資料
    PDF描述
    PA28F400BL-T150 ECONOLINE: RM & RL - Single Output Rail- Industry Standard Pinout- 1kVDC & 2kVDC Isolation- High Efficiency for Low Power Applications- UL94V-0 Package Material- Toroidal Magnetics- Fully Encapsulated- Efficiency to 80%
    PA28F400BV-T60 POWERLINE: RP40-S_D_TE - 2:1 Wide Input Voltage Range- 40 Watts Output Power- 1.6kVDC Isolation- Fixed Operating Frequency- Six-Sided Continuous Shield- Design Meet Safety Standard- Standard 76.2 x66.0x10.2mm Package- Efficiency to 90%
    PA28F400BX-T120 4-MBIT (256K X 16, 512K X 8) BOOT BLOCK FLASH MEMORY FAMILY
    PA28F400CV-B60 2-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY
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