參數(shù)資料
型號: PA28F004S5-120
廠商: INTEL CORP
元件分類: PROM
英文描述: BYTE-WIDE SMART 5 FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT
中文描述: 512K X 8 FLASH 5V PROM, 120 ns, PDSO44
封裝: 13.30 X 28.20 MM, PLASTIC, SOP-44
文件頁數(shù): 19/37頁
文件大?。?/td> 611K
代理商: PA28F004S5-120
E
BYTE-WIDE SMART 5 FlashFile MEMORY FAMILY
19
PRODUCT PREVIEW
SR.7 =
0
1
Start
Write 20H,
Block Address
Write D0H,
Block Address
Full Status
Check if Desired
Block Erase
Complete
FULL STATUS CHECK PROCEDURE
1
0
Read Status Register
Data (See Above)
1
0
Read Status
Register
Suspend
Block Erase
Suspend Block
Erase Loop
Yes
No
1
0
Command Sequence
Error
SR.3 =
SR.5 =
SR.4,5 =
Block Erase
Error
Bus
Operation
Command
Comments
Standby
Check SR.4,5
Both 1 = Command Sequence Error
Standby
SR.5, SR.4, SR.3 and SR.1 are only cleared by the Clear Status
Register command in cases where multiple blocks are erased
before full status is checked.
If error is detected, clear the Status Register before attempting
retry or other error recovery.
Check SR.5
1 = Block Erase Error
Standby
Bus
Operation
Command
Comments
Write
Write
Erase Setup
Read
Data = 20H
Addr = Within Block to be Erased
Check SR.7
1 = WSM Ready
0 = WSM Busy
Repeat for subsequent block erasures.
Full status check can be done after each block erase, or after a
sequence of block erasures.
Write FFH after the last operation to place device in read array mode.
Status Register Data
Standby
Erase
Confirm
Data = D0H
Addr = Within Block to be Erased
Block Erase
Successful
Standby
Check SR.1
1 = Device Protect Detect
RP# = V
, Block Lock-Bit Is Set
Only required for systems
implementing lock-bit configuration
0
1
Device Protect Error
SR.1 =
Check SR.3
1 = V
PP
Error Detect
V
PP
Range Error
Figure 6. Automated Block Erase Flowchart
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