參數(shù)資料
型號(hào): P87C51SBPN,112
廠商: NXP Semiconductors
文件頁(yè)數(shù): 11/38頁(yè)
文件大?。?/td> 0K
描述: IC 80C51 MCU 4K OTP 40-DIP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 9
系列: 87C
核心處理器: 8051
芯體尺寸: 8-位
速度: 16MHz
連通性: EBI/EMI,UART/USART
外圍設(shè)備: POR
輸入/輸出數(shù): 32
程序存儲(chǔ)器容量: 4KB(4K x 8)
程序存儲(chǔ)器類型: OTP
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 705 (CN2011-ZH PDF)
其它名稱: 568-1011-5
935260176112
P87C51SBPN
Philips Semiconductors
Product specification
80C51/87C51/80C52/87C52
80C51 8-bit microcontroller family
4 K/8 K OTP/ROM low voltage (2.7 V–5.5 V),
low power, high speed (33 MHz), 128/256 B RAM
2000 Aug 07
19
PX0
IP (0B8H)
Priority Bit = 1 assigns higher priority
Priority Bit = 0 assigns lower priority
BIT
SYMBOL
FUNCTION
IP.7
Not implemented, reserved for future use.
IP.6
Not implemented, reserved for future use.
IP.5
PT2
Timer 2 interrupt priority bit.
IP.4
PS
Serial Port interrupt priority bit.
IP.3
PT1
Timer 1 interrupt priority bit.
IP.2
PX1
External interrupt 1 priority bit.
IP.1
PT0
Timer 0 interrupt priority bit.
IP.0
PX0
External interrupt 0 priority bit.
SU00572
PT0
PX1
PT1
PS
PT2
0
1
2
3
4
5
6
7
Figure 11. IP Registers
PX0H
IPH (B7H)
Priority Bit = 1 assigns higher priority
Priority Bit = 0 assigns lower priority
BIT
SYMBOL
FUNCTION
IPH.7
Not implemented, reserved for future use.
IPH.6
Not implemented, reserved for future use.
IPH.5
PT2H
Timer 2 interrupt priority bit high.
IPH.4
PSH
Serial Port interrupt priority bit high.
IPH.3
PT1H
Timer 1 interrupt priority bit high.
IPH.2
PX1H
External interrupt 1 priority bit high.
IPH.1
PT0H
Timer 0 interrupt priority bit high.
IPH.0
PX0H
External interrupt 0 priority bit high.
SU01058
PT0H
PX1H
PT1H
PSH
PT2H
0
1
2
3
4
5
6
7
Figure 12. IPH Registers
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