參數(shù)資料
型號(hào): P80C557E6
廠商: NXP Semiconductors N.V.
英文描述: Single-chip 8-bit microcontroller(單片8位微控制器)
中文描述: 單芯片8位微控制器(單片8位微控制器)
文件頁數(shù): 25/64頁
文件大小: 476K
代理商: P80C557E6
Philips Semiconductors
Product specification
P83C557E6/P80C557E6
Single-chip 8-bit microcontroller
1999 Mar 02
25
Figure 22. T2 control register (TM2CON).
7
6
5
4
3
2
1
0
TM2CON (EAH)
T2IS1
T2IS0
T2ER
T2BO
T2P1
T2P0
T2MS1
T2MS0
Table 15.
Description of TM2CON bits
SYMBOL
BIT
FUNCTION
T2IS1
TM2CON.7
Timer T2 16-bit overflow interrupt select
T2IS0
TM2CON.6
Timer T2 byte overflow interrupt select
T2ER
TM2CON.5
Timer T2 external reset enable. When this bit is set, Timer T2 may be reset by a rising edge on RT2 (P1.5).
T2BO
TM2CON.4
Timer T2 byte overflow interrupt flag
T2P1
TM2CON.3
Timer T2 prescaler select
T2P0
TM2CON.2
T2MS1
TM2CON.1
Timer T2 mode select
T2MS0
TM2CON.0
Table 16.
Timer 2 prescaler select
T2P1
T2P0
TIMER T2 CLOCK
0
0
Clock source
0
1
Clock source/2
1
0
Clock source/4
1
1
Clock source/8
Table 17.
Timer 2 mode select
T2MS1
T2MS0
MODE SELECTED
0
0
Timer T2 halted (off)
0
1
T2 clock source = f
CLK
/12
Test mode; do not use
1
0
1
1
T2 clock source = pin T2
Figure 23. Capture control register (CTCON).
7
6
5
4
3
2
1
0
CTCON (EBH)
CTN3
CTP3
CTN2
CTP2
CTN1
CTP1
CTN0
CTP0
Table 18.
Description of CTCON bits
SYMBOL
BIT
FUNCTION
CTN3
CTCON.7
Capture Register 3 triggered by a falling edge on CT3I
CTP3
CTCON.6
Capture Register 3 triggered by a rising edge on CT3I
CTN2
CTCON.5
Capture Register 2 triggered by a falling edge on CT2I
CTP2
CTCON.4
Capture Register 2 triggered by a rising edge on CT2I
CTN1
CTCON.3
Capture Register 1 triggered by a falling edge on CT1I
CTP1
CTCON.2
Capture Register 1 triggered by a rising edge on CT1I
CTN0
CTCON.1
Capture Register 0 triggered by a falling edge on CT0I
CTP0
CTCON.0
Capture Register 0 triggered by a rising edge on CT0I
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