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Chapter 18 Memory Mapping Control (S12XMMCV3)
MC9S12XDP512 Data Sheet, Rev. 2.17
Freescale Semiconductor
677
18.4.2.3
Implemented Memory Map
The global memory spaces reserved for the internal resources (RAM, EEPROM, and FLASH) are not
determined by the MMC module. Size of the individual internal resources are however fixed in the design
of the device cannot be changed by the user. Please refer to the Device User Guide for further details.
Figure 18-23
and
Table 18-20
showthememoryspacesoccupiedbytheon-chipresources.Pleasenotethat
the memory spaces have fixed top addresses.
When the device is operating in expanded modes except emulation single-chip mode, accesses to global
addresses which are not occupied by the on-chip resources (unimplemented areas or external memory
space) result in accesses to the external bus (see
Figure 18-23
).
In emulation single-chip mode, accesses to global addresses which are not occupied by the on-chip
resources (unimplemented areas) result in accesses to the external bus. CPU accesses to global addresses
which are occupied by external memory space result in an illegal access reset (system reset). BDM
accesses to the external space are performed but the data will be undefined.
In single-chip modes accesses by the CPU (except for firmware commands) to any of the unimplemented
areas (see
Figure 18-23
) will result in an illegal access reset (system reset). BDM accesses to the
unimplemented areas are allowed but the data will be undefined.
No misaligned word access from the BDM module will occur; these accesses are blocked in the BDM
module (Refer to BDM Block Guide).
Misaligned word access to the last location of RAM is performed but the data will be undefined.
Misaligned word access to the last location of any global page (64 Kbyte) by any global instruction, is
performed by accessing the last byte of the page and the first byte of the same page, considering the above
mentioned misaligned access cases.
The non-internal resources (unimplemented areas or external space) are used to generate the chip selects
(CS0,CS1,CS2 and CS3) (see
Figure 18-23
), which are only active in normal expanded, emulation
expanded and special test modes (see
Section 18.3.2.1, “MMC Control Register (MMCCTL0)
).
Table 18-20. Global Implemented Memory Space
Internal Resource
$Address
RAM
RAM_LOW = 0x10_0000 minus RAMSIZE
1
1
RAMSIZE is the hexadecimal value of RAM SIZE in bytes
2
EEPROMSIZE is the hexadecimal value of EEPROM SIZE in bytes
EEPROM
EEPROM_LOW = 0x14_0000 minus EEPROMSIZE
2