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Chapter 14 Voltage Regulator (S12VREG3V3V5)
MC9S12XDP512 Data Sheet, Rev. 2.17
Freescale Semiconductor
557
14.2
External Signal Description
Due to the nature of VREG_3V3 being a voltage regulator providing the chip internal power supply
voltages, most signals are power supply signals connected to pads.
Table 14-1
shows all signals of VREG_3V3 associated with pins.
NOTE
Check device level specification for connectivity of the signals.
14.2.1
VDDR — Regulator Power Input Pins
Signal V
DDR
is the power input of VREG_3V3. All currents sourced into the regulator loads flow through
thispin.Achipexternaldecouplingcapacitor(>=100nF,X7Rceramic)betweenV
DDR
andV
SSR
(ifV
SSR
is not available V
SS
) can smooth ripple on V
DDR
.
For entering shutdown mode, pin V
DDR
should also be tied to ground on devices without VREGEN pin.
14.2.2
VDDA, VSSA — Regulator Reference Supply Pins
Signals V
DDA
/V
SSA,
which are supposed to be relatively quiet, are used to supply the analog parts of the
regulator. Internal precision reference circuits are supplied from these signals. A chip external decoupling
capacitor (>=100 nF, X7R ceramic) between V
DDA
and V
SSA
can further improve the quality of this
supply.
14.2.3
VDD, VSS — Regulator Output1 (Core Logic) Pins
Signals V
DD
/V
SS
are the primary outputs of VREG_3V3 that provide the power supply for the core logic.
Thesesignalsareconnectedtodevicepinstoallowexternaldecouplingcapacitors(220nF,X7Rceramic).
In shutdown mode an external supply driving V
DD
/V
SS
can replace the voltage regulator.
Table 14-1. Signal Properties
Name
Function
Reset State
Pull Up
V
DDR
V
DDA
V
SSA
V
DD
V
SS
V
DDPLL
V
SSPLL
Power input (positive supply)
Quiet input (positive supply)
Quiet input (ground)
Primary output (positive supply)
Primary output (ground)
Secondary output (positive supply)
Secondary output (ground)
Optional Regulator Enable
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
V
REGEN
(optional)