參數(shù)資料
型號(hào): OPA699ID
元件分類: 運(yùn)動(dòng)控制電子
英文描述: Wideband, High Gain VOLTAGE LIMITING AMPLIFIER
中文描述: 寬帶,高增益電壓限幅放大器
文件頁數(shù): 17/25頁
文件大?。?/td> 461K
代理商: OPA699ID
OPA699
SBOS261B
17
www.ti.com
To choose the values for both C
S
and C
F
, two parameters and
only three equations need to be solved. The first parameter is
the target high-frequency noise gain (NG
2
), which should be
greater than the minimum stable gain for the OPA699. Here,
a target of NG
2
= 26 is used. The second parameter is the
desired low-frequency signal gain, which also sets the low-
frequency noise gain (NG
1
). To simplify this discussion, we will
target a maximally flat 2nd-order low-pass Butterworth fre-
quency response (Q = 0.707). The signal gain shown in Figure
5 sets the low-frequency noise gain to NG
1
= 1 + R
F
/R
G
(= 2
in this example). Then, using only these two gains and the
gain bandwidth product for the OPA699 (1000MHz), the key
frequency in the compensation is set by Equation1.
Z
GBP
NG
NG
NG
NG
NG
O
=
1
2
1
2
1
2
1
1 2
(1)
Physically, this Z
O
(22.3MHz for the values shown above) is
set by 1/(2
π
R
F
(C
F
+ C
S
)) and is the frequency at which the
rising portion of the noise gain would intersect the unity gain
if projected back to a 0dB gain. The actual zero in the noise
gain occurs at NG
1
Z
O
and the pole in the noise gain occurs
at NG
2
Z
O
. That pole is physically set by 1/(R
F
C
F
). Since
GBP is expressed in Hz, multiply Z
O
by 2
π
and use to get C
F
by solving Equation 2.
C
R Z NG
π
pF
3
F
=
=
(
)
1
2
2
(2)
Finally, since C
S
and C
F
set the high-frequency noise gain,
determine C
S
using Equation 3 (solving for C
S
by using
NG
2
= 6):
(
which gives C
S
= 15pF.
Both of these calculated values have been reduced slightly
in Figure 5 to account for parasitics. The resulting closed-
loop bandwidth is approximately equal to Equation 4.
C
NG
C
)
1
S
F
=
2
(3)
f
Z
GBP
dB
O
3
(4)
For the values shown in Figure 5, f
3dB
is approximately
149MHz. This is less than that predicted by simply dividing
the GBP product by NG
1
. The compensation network con-
trols the bandwidth to a lower value, while providing the full
slew rate at the output and an improved distortion perfor-
mance due to increased loop gain at frequencies below
NG
1
Z
O
.
LOW DISTORTION, LIMITED OUTPUT,
ADC INPUT DRIVER
Figure 6 shows a simple ADC driver that operates on a single
supply, and gives excellent distortion performance. The limit
voltages track the input range of the converter, completely
protecting against input overdrive. Note that the limiting
voltages have been set 100mV above/below the correspond-
ing reference voltage from the converter. This circuit also
implements an improved distortion for an inverting gain of
2 using external compensation.
OPA699
V
S
= +5V
4
2
3
7
5
8
6
V
S
= +5V
+3.5V
+1.5V
102
REFB
REFT
IN
V
IN
0.1
μ
F
100pF
V
H
= +3.6V
V
L
= +1.4V
0.1
μ
F
0.1
μ
F
18pF
1000pF
4pF
750
24.9
374
562
1.4k
1.4k
102
562
ADS822
10-Bit
40MSPS
10-Bit
Data
V
S
= +5V
INT/EXT
RSEL
+V
S
GND
FIGURE 6. Single Supply, Limiting ADC Input Driver.
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