參數(shù)資料
型號: OPA659EVM
廠商: Texas Instruments
文件頁數(shù): 5/32頁
文件大小: 0K
描述: EVAL MODULE FOR OPA659
標準包裝: 1
每 IC 通道數(shù): 1 - 單
放大器類型: J-FET
轉換速率: 2550 V/µs
-3db帶寬: 650MHz
電流 - 輸出 / 通道: 70mA
工作溫度: -40°C ~ 85°C
電流供應(主 IC): 32mA
電壓 - 電源,單路/雙路(±): ±3.5 V ~ 6.5 V
板類型: 完全填充
已供物品:
已用 IC / 零件: OPA659
其它名稱: 296-30974
OPA659EVM-ND
Wideband, Inverting Gain Operation
Wideband, High-Sensitivity, Transimpedance
OPA659
R
OUT
0.1 F
m
10 F
m
0.1 F
m
10 F
m
50
Load
W
50
Source
W
R
T
R
G
V
IN
V
OUT
R
F
+6V
-
6V
OPA659
R
OUT
0.1 F
m
10 F
m
0.1 F
m
10 F
m
50
Load
W
I
D
C
D
C
F
V
OUT
R
F
Photo
Diode
-
V
B
l
+6V
-
6V
www.ti.com ............................................................................................................................................ SBOS342B – DECEMBER 2008 – REVISED AUGUST 2009
Figure 36 shows the noninverting input tied directly to
ground. Often, a bias current-cancelling resistor to
The circuit of Figure 36 shows the inverting gain test
ground is included here to nullify the dc errors caused
circuit
used
for
most
of
the
inverting
by input bias current effects. For a JFET input op
Characteristics graphs. As with the noninverting
amp such as the OPA659, the input bias currents are
applications, most of the curves were characterized
so low that dc errors caused by input bias currents
using signal sources with 50
driving impedance,
are
negligible.
Thus,
no
bias
current-cancelling
and with measurement equipment that presents a
resistor is recommended at the noninverting input.
50
load impedance. In Figure 36, the shunt resistor
RT at VIN should be set so the parallel combination of
the shunt resistor and RG equals 50 to match the
Design
source impedance of the test generator and cable,
while the series output resistor ROUT at VOUT should
The high GBP and low input voltage and current
also be set to 50
to provide matching impedance for
noise for the OPA659 make it an ideal wideband,
the
measurement
equipment
load
and
cable.
transimpedance
amplifier
for
low
to
moderate
Generally, data sheet voltage swing specifications are
transimpedance gains. Higher transimpedance gains
measured at the output pin, VOUT, in Figure 36.
(above 100k
) can benefit from the low input noise
current of a JFET input op amp such as the OPA659.
Designs that require high bandwidth from a large
area detector can benefit from the low input voltage
noise for the OPA659. This input voltage noise is
peaked up over frequency by the diode source
capacitance, and in many cases, may become the
limiting factor to input sensitivity. The key elements to
the design are the expected diode capacitance (CD)
with the reverse bias voltage (–VB) applied, the
desired transimpedance gain, RF, and the GBP for
the OPA659 (350MHz). Figure 37 shows a general
transimpedance amplifier circuit, or TIA, using the
OPA659. Given the source diode capacitance plus
parasitic input capacitance for the OPA659, the
transimpedance gain, and known GBP, the feedback
Figure 36. General Inverting Test Circuit
capacitor value, CF, may be calculated to avoid
excessive peaking in the frequency response.
The inverting circuit can also use a wide range of
resistor values to set the gain; Table 2 lists several
recommended resistor values for inverting gains with
a 50
input/output match.
Table 2. Resistor Values for Inverting Gains with
50
Input/Output Match
INVERTING
GAIN
RF
RG
RT
ROUT
–1
249
61.9
49.9
–2
249
124
84.5
49.9
–5
249
49.9
Open
49.9
–10
499
49.9
Open
49.9
Figure 37. Wideband, Low-Noise, Transimpedance
Amplifier (TIA)
Copyright 2008–2009, Texas Instruments Incorporated
13
Product Folder Link(s): OPA659
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