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6
OPA654
TYPICAL PERFORMANCE CURVES
(CONT)
T
A
= +25
°
C, V
S
=
±
15V unless otherwise noted.
CIRCUIT LAYOUT
With any wide-bandwidth circuitry, careful circuit layout
will ensure best performance. Make short, direct circuit
interconnections and avoid stray wiring capacitance—espe-
cially at the inverting input pin. A component-side ground
plane will help ensure low ground impedance. Do not place
the ground plane under or near the inputs and feedback
network.
Power supplies should be bypassed with good high-fre-
quency capacitors positioned close to the op amp pins. In
most cases, a 2.2
μ
F solid tantalum capacitor for each power
supply is adequate. The OPA654 can deliver load currents
up to 200mA. Even if steady-state load currents are lower,
signal transients may demand large current transients from
the power supplies. It is the power supply bypass capacitors
which must supply these current transients. Larger bypass
capacitors such as 10
μ
F solid tantalum capacitors may
improve dynamic performance in these applications.
CASE CONNECTION
The case of the TO-3 metal package should be connected to
ground. Failure to connect the case to ground will not
damage the device but will degrade its AC performance. The
case is internally connected to the substrate of the
dielectrically isolated IC. This substrate is DC-neutral—it is
not connected to the V– power supply as it would be with
most analog ICs. In principle, it could be connected to any
AC ground potential such as one of the power supplies, but
DC ground is usually most convenient. Do not connect the
case to DC potentials which exceed the power supply volt-
ages,
±
V
S
.
OFFSET ADJUSTMENT
Many applications require no external offset voltage adjust-
ment. Figure 1a shows connection of an optional offset
voltage trimming potentiometer. Use a small, non-inductive
potentiometer with short connections to the trim pins. Avoid
stray capacitance from the input or output nodes. The added
resistors in Figure 1b help decouple the potentiometer from
these sensitive nodes, making the type and location of the
potentiometer less critical. This also reduces the trim range,
providing more adjustment resolution. Do not use an offset
voltage adjustment to correct for offsets produced in other
circuitry since this can introduce large offset voltage drift.
COMPENSATION
The OPA654 uses external compensation capacitors. This
tailors the open-loop response characteristics to the applica-
tion. Its effect can be seen in the open-loop gain and phase
curves.
Figures 2 shows typical capacitor values for various closed-
loop gains. This chart should be considered a starting point
for optimizing an application. Many variables including
circuit layout, source and load characteristics, and desired
dynamic behavior will affect the optimum capacitor values.
Capacitive loads change op amp behavior and higher com-
pensation capacitor values are generally required. Resistor
R
, shown in Figure 3, can improve the ability to drive a
capacitive load. Typical values for R
range from 5
to
50
, depending on the load and how much voltage drop can
be tolerated.
MAXIMUM POWER DISSIPATION vs TEMPERATURE
7
6
5
4
3
2
1
0
0
25
50
75
100
125
150
Temperature (°C)
I
OPA654AM
Metal TO-3
For case Temp
=15°C/W
For ambient Temp
= 45°C/W
JA
θ
θ
OUTPUT CURRENT LIMIT vs TEMPERATURE
450
400
350
300
250
200
150
–55
–25
+5
+125
Temperature (°C)
±
+35
+65
+95
FIGURE 1. Optional Offset Voltage Trim Circuits.
Trim Range ~
±
100mV
(a)
Trim Range ~
±
20mV
(b)
~
~
2.2k
2.2k
50k to
100k
10k to
100k
V+
V+
1
8
4
6
5
1
8
4
6
5