![](http://datasheet.mmic.net.cn/370000/OPA3681_datasheet_16726205/OPA3681_13.png)
13
OPA3681
in 75
to match the typical video source impedance. The
disable control is used to switch between channels by feed-
ing a logic control line directly to all three V
DIS
inputs on
one package, and its complement to the three V
DIS
inputs on
the other. Since the disable feature is intentionally make-
before-break (to ensure that the output does not float in
transition), each of the two possible outputs for the three
RGB lines are combined through a limiting resistor. This
82.5
resistor limits the current between the two outputs
during switching. Each output will have a disabled channel.
The feedback and output network connected on the output
slightly attenuates the signal going out onto the 75
cable.
The gain and output matching resistors (82.5
) have been
slightly increased to get a signal gain of +1 to the matched
load and provide a 75
output impedance to the cable. The
section on Disable Operation shows the turn-on and turn-off
switching glitches, using a grounded input for the single
channel, is typically less than
±
50mV. Where two outputs
are switched (shown in Figure 4), the output line is always
under the control of one amplifier or the other due to the
“make-before-break” disable timing. In this case, the switch-
ing glitches for 0V inputs drops to < 20mV.
VIDEO DAC RECONSTRUCTION FILTER
Wideband current-feedback op amps make ideal elements
for implementing high-speed active filters where the ampli-
fier is used as fixed gain block inside a passive RC circuit
network. Their relatively constant bandwidth versus gain,
provides low interaction between the actual filter poles and
the required gain for the amplifier. Figure 5 shows an
example of a video DAC reconstruction filter.
The delay-equalized filter in Figure 5 compensates for the
DAC’s sin(x)/x response, and minimizes aliasing artifacts. It
is designed for single +5V operation, with a 13.5Msps DAC
sampling rate, and a 5.5MHz cutoff frequency.
The first op amp buffers the video DAC output and the first
filter section from each other. This first filter section pro-
vides group delay equalization. The second and third filter
sections provide a 6th-order lowpass filter response that also
compensates for the DAC’s sin(x)/x response.
The filter response can be seen in Figure 6.
FIGURE 5. Filter Schematic.
FIGURE 6. DAC Reconstruction Filter Response.
HIGH POWER xDSL LINE DRIVER
Emerging broadband access technologies are making sig-
nificant demands on the output stage drivers. Some of the
higher frequency versions, particularly in VDSL, require
passive bandpass filters to spectrally isolate the upstream
from downstream frequency bands. Figure 7 shows one
possible implementation of this using single-ended filters
and giving differential push/pull drive into a transformer.
The DAC output from the analog front end (AFE) typically
requires isolation from the complex filter impedance. The
first stage provides a tunable gain (using R
G
) with a fixed
412
243
82.5
499
100pF
56pF
220pF
+5V
402
237
97.6
499
1/3
OPA3681
100pF
56pF
220pF
+5V
75.5
1/3
OPA3681
499
100
μ
F
953
+5V
1/3
OPA3681
953
499
499
120pF
100
μ
F
V
O
Video
In
+5V
20
10
0
–10
–20
–30
–40
–50
0
1
10
100
Frequency (MHz)
(
f
–3dB