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| 型號(hào)： | NM93C13 |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | EEPROM |
| 英文描述： | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 中文描述： | 該CAT24FC02是一個(gè)2 KB的EEPROM的國內(nèi)256個(gè)8位每字舉辦的串行CMOS |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 161K |
| 代理商： | NM93C13 |
Absolute Maximum Ratings
(Note 1)
Ambient Storage Temperature
b
65
§
C to
a
150
§
C
a
6.5V to
b
0.3V
All Input or Output Voltages
with Respect to Ground
Lead Temp. (Soldering, 10 sec.)
a
300
§
C
2000V
ESD Rating
Operating Conditions
Ambient Operating Temperature
NM93C13–NM93C14
0
§
C to
a
70
§
C
4.5V to 5.5V
Power Supply
DC and AC Electrical Characteristics
V
CC
e
5.0V
g
10% (unless otherwise specified) (Note 2)
Symbol
Parameter
Conditions
Min
Max
Units
I
CC1
Operating Current
CS
e
V
IH
, SK
e
1 MHz
CS
e
0V
4
mA
I
CC3
Standby Current
200
m
A
I
IL
Input Leakage
V
IN
e
0V to V
CC
V
IN
e
0V to V
CC
b
10
10
m
A
I
OL
Output Leakage
b
10
10
m
A
V
IL
V
IH
Input Low Voltage
Input High Voltage
b
0.1
2
0.8
V
V
CC
a
1
V
OL1
Output Low Voltage
I
OL
e
2.1 mA
I
OH
e b
400
m
A
I
OL
e
10
m
A
I
OH
e b
10
m
A
0.4
V
V
OH1
Output High Voltage
2.4
V
V
OL2
V
OH2
Output Low Voltage
Output High Voltage
0.2
V
V
CC
b
0.2
f
SK
SK Clock Frequency
1
MHz
t
SKH
SK High Time
(Note 3)
300
ns
t
SKL
SK Low Time
(Note 3)
250
ns
t
SKS
SK Setup Time
50
ns
t
CS
Minimum CS Low Time
250
ns
t
CSS
CS Setup Time
50
ns
t
DH
D0 Hold Time
70
ns
t
DIS
DI Setup Time
100
ns
t
CSH
CS Hold Time
0
ns
t
DIH
DI Hold Time
20
ns
t
PD1
Output Delay to ‘‘1’’
500
ns
t
PD0
Output Delay to ‘‘0’’
500
ns
t
SV
CS to Status Valid
CS to DO in TRI-STATE
é
500
ns
t
DF
CS
e
V
IL
100
ns
t
WP
Write Cycle Time
10
ms
Capacitance
(Note 4)
T
A
e
25
§
C f
e
1 MHz
Symbol
Test
Typ
Max
Units
C
OUT
Output Capacitance
5
pF
C
IN
Input Capacitance
5
pF
AC Test Conditions
Output Load
1 TTL Gate and C
L
e
100 pF
Input Pulse Levels
0.4V to 2.4V
Timing Measurement Reference Level
Input
Output
1V and 2V
0.8V and 2V
Note 1:
Stress above those listed under ‘‘Absolute Maximum Ratings’’ may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operational sections of the specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note 2:
100% functional test; AC/DC parameters sample tested to 0.4% AQL.
Note 3:
The SK frequency specification specifies a minimum SK clock period of 1
m
s, therefore in an SK clock cycle t
SKH
a
t
SKL
must be greater than or equal to
1
m
s. For example, if the t
SKL
e
500 ns then the minimum t
SKH
e
500 ns in order to meet the SK frequency specification.
Note 4:
This parameter is periodically sampled and not 100% tested.
3
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