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參數(shù)資料
| 型號： | NCP7662 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | INDUCTORLESS VOLTAGE CONVERTER |
| 中文描述： | 電感電壓轉(zhuǎn)換器 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 152K |
| 代理商： | NCP7662 |
NCP7662
http://onsemi.com
4
DETAILED DESCRIPTION
The NCP7662 contains all the necessary circuitry to
complete a negative voltage converter, with the exception of
two external capacitors which may be inexpensive 1
μ
F
polarized electrolytic types. The mode of operation of the
device may be best understood by considering Figure 2,
which shows an idealized negative voltage converter.
Capacitor C1 is charged to a voltage V+ for the half cycle
when switches S1 and S3 are closed. (Note: Switches S2 and
S4 are open during this half cycle.) During the second half
cycle of operation, switches S2 and S4 are closed, with S1
and S3 open, thereby shifting capacitor C1 negatively by V+
volts. Charge is then transferred from C1 to C2 such that the
voltage on C2 is exactly V+, assuming ideal switches and no
load on C2. The NCP7662 approaches this ideal situation
more closely than existing non–mechanical circuits.
In the NCP7662 the four switches of Figure 2 are MOS
power switches; S1 is a P–channel device and S2, S3 and S4
are N–channel devices. The main difficulty with this
approach is that in integrating the switches, the substrates of
S3 and S4 must always remain reverse biased with respect to
their sources, but not so much as to degrade their “ON’’
resistances. In addition, at circuit start up, and under output
short circuit conditions (VOUT = V+), the output voltage
must be sensed and the substrate bias adjusted accordingly.
Failure to accomplish this would result in high power losses
and probable device latchup.
The problem is eliminated in the NCP7662 by a logic
network which senses the output voltage (VOUT) together
with the level translators, and switches the substrates of S3
and S4 to the correct level to maintain necessary reverse bias.
The voltage regulator portion of the NCP7662 is an
integral part of the anti–latchup circuitry; however, its
inherent voltage drop can degrade operation at low voltages.
Therefore, to improve low voltage operation, the “LV’’ pin
should be connected to GND, disabling the regulator. For
supply voltages greater than 3.5 volts, the LV terminal must
be left open to insure latchup proof operation and prevent
device damage.
(+5 V)
4
1
2
3
8
7
6
5
N
+
+
VO
IS
RL
IL
C2
10
μ
F
V+
C1
10
μ
F
V+
Figure 1. Test Circuit
THEORETICAL POWER EFFICIENCY
CONSIDERATIONS
In theory, a voltage converter can approach 100%
efficiency if certain conditions are met:
A. The drive circuitry consumes minimal power.
B. The output switches have extremely low ON resistance
and virtually no offset.
C. The impedances of the pump and reservoir capacitors
are negligible at the pump frequency.
The NCP7662 approaches these conditions for negative
voltage conversion if large values of C1 and C2 are used.
Energy is lost only in the transfer of charge between
capacitors if a change in voltage occurs.
The energy lost
is defined by:
E = 1/2 C1 (V12 – V22)
where V1 and V2 are the voltages on C1 during the pump and
transfer cycles. If the impedances of C1 and C2 are relatively
high at the pump frequency (refer to Figure 2) compared to
the value of RL, there will be a substantial difference in
voltages V1 and V2. Therefore, it is desirable not only to
make C2 as large as possible to eliminate output voltage
ripple, but also to employ a correspondingly large value for
C1 in order to achieve maximum efficiency of operation.
Dos and Don’ts
1. Do not exceed maximum supply voltages.
2. Do not connect the LV terminal to GND for supply
voltages greater than 3.5 volts.
3. Do not short circuit the output to V+ supply for voltages
above 5.5 volts for extended periods; however, transient
conditions including start–up are okay.
4. When using polarized capacitors in the inverting mode,
the + terminal of C1 must be connected to pin 2 of the
NCP7662 and the – terminal of C2 must be connected to
GND.
5. If the voltage supply driving the NCP7662 has a large
source impedance (25–30 ohms), then a 2.2
μ
F capacitor
from pin 8 to ground may be required to limit the rate of
rise of the input voltage to less than 2 V/
μ
s.
Figure 2. Idealized Negative Voltage Capacitor
VIN
= – VIN
VOUT
C1
C2
S1
S2
S3
S4
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| NCP7662/D | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Inductorless Voltage Converter |
| NCP7662DR2 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:INDUCTORLESS VOLTAGE CONVERTER |
| NCP7662P | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:ON Semiconductor 功能描述: |
| NCP7800 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:1.0 A Positive Voltage Regulators |
| NCP7805ACTG | 功能描述:穩(wěn)壓二極管 ANA 1A 5V VREG RoHS:否 制造商:Vishay Semiconductors 齊納電壓:12 V 電壓容差:5 % 電壓溫度系數(shù):0.075 % / K 齊納電流: 功率耗散:3 W 最大反向漏泄電流:3 uA 最大齊納阻抗:7 Ohms 最大工作溫度:+ 150 C 安裝風格:SMD/SMT 封裝 / 箱體:DO-214AC 封裝:Reel |
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